Searched refs:DMA_CSELR_C2S_Pos (Results 1 – 25 of 39) sorted by relevance
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1191 #define DMA_CSELR_C2S_Pos (4U) macro1192 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
5651 #define DMA_CSELR_C2S_Pos (4U) macro5652 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1228 #define DMA_CSELR_C2S_Pos (4U) macro1229 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1218 #define DMA_CSELR_C2S_Pos (4U) macro1219 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1212 #define DMA_CSELR_C2S_Pos (4U) macro1213 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1220 #define DMA_CSELR_C2S_Pos (4U) macro1221 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1269 #define DMA_CSELR_C2S_Pos (4U) macro1270 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1397 #define DMA_CSELR_C2S_Pos (4U) macro1398 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1329 #define DMA_CSELR_C2S_Pos (4U) macro1330 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1457 #define DMA_CSELR_C2S_Pos (4U) macro1458 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1370 #define DMA_CSELR_C2S_Pos (4U) macro1371 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1529 #define DMA_CSELR_C2S_Pos (4U) macro1530 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1401 #define DMA_CSELR_C2S_Pos (4U) macro1402 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1659 #define DMA_CSELR_C2S_Pos (4U) macro1660 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1681 #define DMA_CSELR_C2S_Pos (4U) macro1682 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1787 #define DMA_CSELR_C2S_Pos (4U) macro1788 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1789 #define DMA_CSELR_C2S_Pos (4U) macro1790 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1939 #define DMA_CSELR_C2S_Pos (4U) macro1940 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1811 #define DMA_CSELR_C2S_Pos (4U) macro1812 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1917 #define DMA_CSELR_C2S_Pos (4U) macro1918 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
1809 #define DMA_CSELR_C2S_Pos (4U) macro1810 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
2586 #define DMA_CSELR_C2S_Pos (4U) macro2587 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
2802 #define DMA_CSELR_C2S_Pos (4U) macro2803 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
6284 #define DMA_CSELR_C2S_Pos (4U) macro6285 #define DMA_CSELR_C2S_Msk (0xFUL << DMA_CSELR_C2S_Pos) /*!< 0x000000F0 */
