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Searched refs:DMA_CLLR_ULL (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h955 #define LL_DMA_UPDATE_CLLR DMA_CLLR_ULL /*!< Update CLLR register from memory :
4716 …DMA_CLLR_UB2 | DMA_CLLR_ULL | DMA_CLLR_LA), (RegistersUpdate | (LinkedListAddrOffset & DMA_CLLR_LA… in LL_DMA_ConfigLinkUpdate()
5311 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CLLR, DMA_CLLR_ULL); in LL_DMA_EnableCLLRUpdate()
5341 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CLLR, DMA_CLLR_ULL); in LL_DMA_DisableCLLRUpdate()
5371 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CLLR, DMA_CLLR_ULL) in LL_DMA_IsEnabledCLLRUpdate()
5372 == (DMA_CLLR_ULL)) ? 1UL : 0UL); in LL_DMA_IsEnabledCLLRUpdate()
/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h954 #define LL_DMA_UPDATE_CLLR DMA_CLLR_ULL /*!< Update CLLR register from memory :
5284 …DMA_CLLR_UB2 | DMA_CLLR_ULL | DMA_CLLR_LA), (RegistersUpdate | (LinkedListAddrOffset & DMA_CLLR_LA… in LL_DMA_ConfigLinkUpdate()
5879 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CLLR, DMA_CLLR_ULL); in LL_DMA_EnableCLLRUpdate()
5909 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CLLR, DMA_CLLR_ULL); in LL_DMA_DisableCLLRUpdate()
5939 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CLLR, DMA_CLLR_ULL) in LL_DMA_IsEnabledCLLRUpdate()
5940 == (DMA_CLLR_ULL)) ? 1UL : 0UL); in LL_DMA_IsEnabledCLLRUpdate()
/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_dma_ex.c4195 DMA_CLLR_UB2 | DMA_CLLR_ULL; in DMA_List_GetCLLRNodeInfo()
4210 …llr_mask = DMA_CLLR_UT1 | DMA_CLLR_UT2 | DMA_CLLR_UB1 | DMA_CLLR_USA | DMA_CLLR_UDA | DMA_CLLR_ULL; in DMA_List_GetCLLRNodeInfo()
4393 DMA_CLLR_UDA, DMA_CLLR_UT3, DMA_CLLR_UB2, DMA_CLLR_ULL in DMA_List_ConvertNodeToDynamic()
4458 DMA_CLLR_UDA, DMA_CLLR_UT3, DMA_CLLR_UB2, DMA_CLLR_ULL in DMA_List_ConvertNodeToStatic()
4604 ((DMA_NodeTypeDef *)currentnode_addr)->LinkRegisters[current_cllr_offset] &= ~DMA_CLLR_ULL; in DMA_List_UpdateDynamicQueueNodesCLLR()
Dstm32u5xx_ll_dma.c1123 … DMA_CLLR_UDA | DMA_CLLR_ULL))); in LL_DMA_CreateLinkNode()
1151 … DMA_CLLR_UT3 | DMA_CLLR_UB2 | DMA_CLLR_ULL))); in LL_DMA_ConnectLinkNode()
/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_dma_ex.c4195 DMA_CLLR_UB2 | DMA_CLLR_ULL; in DMA_List_GetCLLRNodeInfo()
4210 …llr_mask = DMA_CLLR_UT1 | DMA_CLLR_UT2 | DMA_CLLR_UB1 | DMA_CLLR_USA | DMA_CLLR_UDA | DMA_CLLR_ULL; in DMA_List_GetCLLRNodeInfo()
4393 DMA_CLLR_UDA, DMA_CLLR_UT3, DMA_CLLR_UB2, DMA_CLLR_ULL in DMA_List_ConvertNodeToDynamic()
4458 DMA_CLLR_UDA, DMA_CLLR_UT3, DMA_CLLR_UB2, DMA_CLLR_ULL in DMA_List_ConvertNodeToStatic()
4604 ((DMA_NodeTypeDef *)currentnode_addr)->LinkRegisters[current_cllr_offset] &= ~DMA_CLLR_ULL; in DMA_List_UpdateDynamicQueueNodesCLLR()
Dstm32h5xx_ll_dma.c1116 … DMA_CLLR_UDA | DMA_CLLR_ULL))); in LL_DMA_CreateLinkNode()
1144 … DMA_CLLR_UT3 | DMA_CLLR_UB2 | DMA_CLLR_ULL))); in LL_DMA_ConnectLinkNode()
/hal_stm32-3.4.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h4010 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
Dstm32h562xx.h5720 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
Dstm32h563xx.h7804 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
Dstm32h573xx.h8215 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
/hal_stm32-3.4.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h6023 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
Dstm32u545xx.h6423 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
Dstm32u575xx.h6422 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
Dstm32u585xx.h6871 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
Dstm32u5a5xx.h7125 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
Dstm32u595xx.h6676 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
Dstm32u599xx.h6964 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro
Dstm32u5a9xx.h7413 #define DMA_CLLR_ULL DMA_CLLR_ULL_Msk /*!< Update lin… macro