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Searched refs:DMA_CBR1_BNDT (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_dma.h683 MODIFY_REG((__HANDLE__)->Instance->CBR1, DMA_CBR1_BNDT, (__COUNTER__))
691 (((__HANDLE__)->Instance->CBR1) & DMA_CBR1_BNDT)
870 (((SIZE) > 0U) && ((SIZE) <= DMA_CBR1_BNDT))
Dstm32u5xx_ll_dma.h4034 (DMA_CBR1_BNDT | DMA_CBR1_BRC), (BlkDataLength | (BlkRptCount << DMA_CBR1_BRC_Pos))); in LL_DMA_ConfigBlkCounters()
4272 …_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CBR1, DMA_CBR1_BNDT, in LL_DMA_SetBlkDataLength()
4303 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CBR1, DMA_CBR1_BNDT)); in LL_DMA_GetBlkDataLength()
/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_dma.h932 MODIFY_REG((__HANDLE__)->Instance->CBR1, DMA_CBR1_BNDT, (__COUNTER__))
940 (((__HANDLE__)->Instance->CBR1) & DMA_CBR1_BNDT)
1121 (((SIZE) > 0U) && ((SIZE) <= DMA_CBR1_BNDT))
Dstm32h5xx_ll_dma.h4602 (DMA_CBR1_BNDT | DMA_CBR1_BRC), (BlkDataLength | (BlkRptCount << DMA_CBR1_BRC_Pos))); in LL_DMA_ConfigBlkCounters()
4840 …_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CBR1, DMA_CBR1_BNDT, in LL_DMA_SetBlkDataLength()
4871 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CBR1, DMA_CBR1_BNDT)); in LL_DMA_GetBlkDataLength()
/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_dma.c1597 MODIFY_REG(hdma->Instance->CBR1, DMA_CBR1_BNDT, (SrcDataSize & DMA_CBR1_BNDT)); in DMA_SetConfig()
Dstm32u5xx_hal_hash.c1517 & DMA_CBR1_BNDT) / 4U; in HAL_HASH_DMAFeed_ProcessSuspend()
1538 & DMA_CBR1_BNDT) / 4U; in HAL_HASH_DMAFeed_ProcessSuspend()
Dstm32u5xx_hal_dma_ex.c3780 pNode->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = (pNodeConfig->DataSize & DMA_CBR1_BNDT); in DMA_List_BuildNode()
3999 pNodeConfig->DataSize = pNode->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] & DMA_CBR1_BNDT; in DMA_List_GetNodeConfig()
/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_dma.c1599 MODIFY_REG(hdma->Instance->CBR1, DMA_CBR1_BNDT, (SrcDataSize & DMA_CBR1_BNDT)); in DMA_SetConfig()
Dstm32h5xx_hal_dma_ex.c3780 pNode->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = (pNodeConfig->DataSize & DMA_CBR1_BNDT); in DMA_List_BuildNode()
3999 pNodeConfig->DataSize = pNode->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] & DMA_CBR1_BNDT; in DMA_List_GetNodeConfig()
Dstm32h5xx_hal_hash.c755 & DMA_CBR1_BNDT) / 4U; in HAL_HASH_ProcessSuspend()
/hal_stm32-3.4.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3961 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
Dstm32h562xx.h5671 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
Dstm32h563xx.h7755 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
Dstm32h573xx.h8166 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
/hal_stm32-3.4.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h5974 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
Dstm32u545xx.h6374 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
Dstm32u575xx.h6373 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
Dstm32u585xx.h6822 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
Dstm32u5a5xx.h7076 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
Dstm32u595xx.h6627 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
Dstm32u599xx.h6915 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro
Dstm32u5a9xx.h7364 #define DMA_CBR1_BNDT DMA_CBR1_BNDT_Msk /*!< Block numb… macro