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Searched refs:DEVR0 (Results 1 – 6 of 6) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_i3c.h691 return ((READ_BIT(I3Cx->DEVR0, I3C_DEVR0_RSTVAL) == (I3C_DEVR0_RSTVAL)) ? 1UL : 0UL); in LL_I3C_IsEnabledReset()
1220 SET_BIT(I3Cx->DEVR0, I3C_DEVR0_DAVAL); in LL_I3C_EnableOwnDynAddress()
1231 CLEAR_BIT(I3Cx->DEVR0, I3C_DEVR0_DAVAL); in LL_I3C_DisableOwnDynAddress()
1242 return ((READ_BIT(I3Cx->DEVR0, I3C_DEVR0_DAVAL) == (I3C_DEVR0_DAVAL)) ? 1UL : 0UL); in LL_I3C_IsEnabledOwnDynAddress()
1255 MODIFY_REG(I3Cx->DEVR0, I3C_DEVR0_DA, (OwnDynamicAddress << I3C_DEVR0_DA_Pos)); in LL_I3C_SetOwnDynamicAddress()
1266 return (uint8_t)(READ_BIT(I3Cx->DEVR0, I3C_DEVR0_DA) >> I3C_DEVR0_DA_Pos); in LL_I3C_GetOwnDynamicAddress()
1278 SET_BIT(I3Cx->DEVR0, I3C_DEVR0_IBIEN); in LL_I3C_EnableIBI()
1290 CLEAR_BIT(I3Cx->DEVR0, I3C_DEVR0_IBIEN); in LL_I3C_DisableIBI()
1301 return ((READ_BIT(I3Cx->DEVR0, I3C_DEVR0_IBIEN) == (I3C_DEVR0_IBIEN)) ? 1UL : 0UL); in LL_I3C_IsEnabledIBI()
1313 SET_BIT(I3Cx->DEVR0, I3C_DEVR0_CREN); in LL_I3C_EnableControllerRoleReq()
[all …]
/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_i3c.c1826 …MODIFY_REG(hi3c->Instance->DEVR0, (I3C_DEVR0_HJEN | I3C_DEVR0_IBIEN | I3C_DEVR0_CREN), devr0_value… in HAL_I3C_Tgt_Config()
/hal_stm32-3.4.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h262 …__IO uint32_t DEVR0; /*!< I3C own Target characteristics register, Address offset: 0x60… member
Dstm32h562xx.h309 …__IO uint32_t DEVR0; /*!< I3C own Target characteristics register, Address offset: 0x60… member
Dstm32h563xx.h314 …__IO uint32_t DEVR0; /*!< I3C own Target characteristics register, Address offset: 0x60… member
Dstm32h573xx.h318 …__IO uint32_t DEVR0; /*!< I3C own Target characteristics register, Address offset: 0x60… member