/hal_stm32-2.7.6/stm32cube/stm32g0xx/soc/ |
D | stm32g070xx.h | 6482 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 6483 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g031xx.h | 6546 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 6547 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g030xx.h | 6282 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 6283 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g050xx.h | 6343 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 6344 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g051xx.h | 6945 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 6946 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g041xx.h | 6850 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 6851 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g071xx.h | 7333 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 7334 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g061xx.h | 7249 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 7250 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g081xx.h | 7637 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 7638 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g0b0xx.h | 7663 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 7664 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g0c1xx.h | 9173 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 9174 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g0b1xx.h | 8869 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 8870 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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/hal_stm32-2.7.6/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 9202 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 9203 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32wle5xx.h | 9202 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 9203 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32wl54xx.h | 10874 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 10875 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32wl55xx.h | 10874 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 10875 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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/hal_stm32-2.7.6/stm32cube/stm32wbxx/soc/ |
D | stm32wb50xx.h | 9490 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 9491 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32wb30xx.h | 9486 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 9487 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32wb35xx.h | 10871 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 10872 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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/hal_stm32-2.7.6/stm32cube/stm32wbxx/soc/Include/ |
D | stm32wb10xx.h | 9363 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 9364 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32wb15xx.h | 9480 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 9481 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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/hal_stm32-2.7.6/stm32cube/stm32g4xx/soc/ |
D | stm32gbk1cb.h | 10597 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 10598 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g431xx.h | 10625 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 10626 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g441xx.h | 10855 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 10856 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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D | stm32g4a1xx.h | 11365 #define TIM_BDTR_BK2DSRM_Pos (27U) macro 11366 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
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