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Searched refs:TIM_BDTR_BK2DSRM_Pos (Results 1 – 25 of 61) sorted by relevance

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/hal_stm32-2.7.6/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h6482 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
6483 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g031xx.h6546 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
6547 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g030xx.h6282 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
6283 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g050xx.h6343 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
6344 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g051xx.h6945 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
6946 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g041xx.h6850 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
6851 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g071xx.h7333 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
7334 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g061xx.h7249 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
7250 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g081xx.h7637 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
7638 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g0b0xx.h7663 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
7664 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g0c1xx.h9173 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
9174 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g0b1xx.h8869 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
8870 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
/hal_stm32-2.7.6/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h9202 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
9203 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32wle5xx.h9202 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
9203 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32wl54xx.h10874 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
10875 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32wl55xx.h10874 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
10875 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
/hal_stm32-2.7.6/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h9490 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
9491 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32wb30xx.h9486 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
9487 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32wb35xx.h10871 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
10872 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
/hal_stm32-2.7.6/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h9363 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
9364 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32wb15xx.h9480 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
9481 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
/hal_stm32-2.7.6/stm32cube/stm32g4xx/soc/
Dstm32gbk1cb.h10597 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
10598 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g431xx.h10625 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
10626 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g441xx.h10855 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
10856 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */
Dstm32g4a1xx.h11365 #define TIM_BDTR_BK2DSRM_Pos (27U) macro
11366 #define TIM_BDTR_BK2DSRM_Msk (0x1UL << TIM_BDTR_BK2DSRM_Pos) /*!< 0x08000000 */

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