Searched refs:RCC_PLL3_DIVQ (Results 1 – 6 of 6) sorted by relevance
292 __HAL_RCC_PLL3CLKOUT_DISABLE(RCC_PLL3_DIVP | RCC_PLL3_DIVQ | RCC_PLL3_DIVR); in RCCEx_PLL3_Config()394 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP | RCC_PLL3_DIVQ | RCC_PLL3_DIVR); in RCCEx_PLL3_Config()399 __HAL_RCC_PLL3CLKOUT_DISABLE(RCC_PLL3_DIVP | RCC_PLL3_DIVQ | RCC_PLL3_DIVR); in RCCEx_PLL3_Config()713 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ); in HAL_RCCEx_PeriphCLKConfig()749 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ); in HAL_RCCEx_PeriphCLKConfig()800 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ); in HAL_RCCEx_PeriphCLKConfig()850 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ); in HAL_RCCEx_PeriphCLKConfig()901 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ); in HAL_RCCEx_PeriphCLKConfig()951 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ); in HAL_RCCEx_PeriphCLKConfig()1002 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ); in HAL_RCCEx_PeriphCLKConfig()[all …]
392 #define RCC_PLL3_DIVQ RCC_PLL3CFGR_PLL3QEN macro
478 #define RCC_PLL3_DIVQ RCC_PLLCFGR_DIVQ3EN macro3965 ((VALUE) == RCC_PLL3_DIVQ) || \
3687 __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ); in RCCEx_PLL3_Config()
885 #define RCC_PLL3_DIVQ RCC_PLL3CR_DIVQEN macro889 ((VALUE) == RCC_PLL3_DIVQ) || \
1371 if (__HAL_RCC_GET_PLL3CLKOUT_CONFIG(RCC_PLL3_DIVQ) != 0U) in HAL_RCCEx_GetPLL3ClockFreq()
