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Searched refs:RCC_APBSMENR1_WWDGSMEN (Results 1 – 13 of 13) sorted by relevance

/hal_stm32-2.7.6/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1990 #define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE() SET_BIT(RCC->APBSMENR1, RCC_APBSMENR1_WWDGSMEN)
2054 #define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APBSMENR1, RCC_APBSMENR1_WWDGSMEN)
2245 #define __HAL_RCC_WWDG_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APBSMENR1, RCC_APBSMENR1_WWDGSMEN
2317 #define __HAL_RCC_WWDG_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APBSMENR1, RCC_APBSMENR1_WWDGSMEN
/hal_stm32-2.7.6/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h4491 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g031xx.h4524 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g030xx.h4307 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g050xx.h4350 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g051xx.h4890 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g041xx.h4778 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g071xx.h5259 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g061xx.h5144 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g081xx.h5513 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g0b0xx.h5556 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g0c1xx.h6893 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro
Dstm32g0b1xx.h6639 #define RCC_APBSMENR1_WWDGSMEN RCC_APBSMENR1_WWDGSMEN_Msk macro