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Searched refs:DLYBx (Results 1 – 5 of 5) sorted by relevance

/hal_stm32-2.7.6/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_dlyb.c109 void LL_DLYB_SetDelay(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg) in LL_DLYB_SetDelay() argument
112 assert_param(IS_DLYB_ALL_INSTANCE(DLYBx)); in LL_DLYB_SetDelay()
115 SET_BIT(DLYBx->CR, DLYB_CR_SEN); in LL_DLYB_SetDelay()
118 DLYBx->CFGR = (pdlyb_cfg->PhaseSel) | ((pdlyb_cfg->Units) << DLYB_CFGR_UNIT_Pos); in LL_DLYB_SetDelay()
121 CLEAR_BIT(DLYBx->CR, DLYB_CR_SEN); in LL_DLYB_SetDelay()
132 void LL_DLYB_GetDelay(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg) in LL_DLYB_GetDelay() argument
135 assert_param(IS_DLYB_ALL_INSTANCE(DLYBx)); in LL_DLYB_GetDelay()
138 pdlyb_cfg->Units = ((DLYBx->CFGR & DLYB_CFGR_UNIT) >> DLYB_CFGR_UNIT_Pos); in LL_DLYB_GetDelay()
139 pdlyb_cfg->PhaseSel = (DLYBx->CFGR & DLYB_CFGR_SEL); in LL_DLYB_GetDelay()
150 uint32_t LL_DLYB_GetClockPeriod(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg) in LL_DLYB_GetClockPeriod() argument
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/hal_stm32-2.7.6/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_delayblock.c96 HAL_StatusTypeDef DelayBlock_Enable(DLYB_TypeDef *DLYBx) in DelayBlock_Enable() argument
106 DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN; in DelayBlock_Enable()
116 DLYBx->CFGR = DLYB_MAX_SELECT | (unit_current << DLYB_CFGR_UNIT_Pos); in DelayBlock_Enable()
120 while ((DLYBx->CFGR & DLYB_CFGR_LNGF) == 0U) in DelayBlock_Enable()
129 if ((DLYBx->CFGR & lng_mask) != 0U) in DelayBlock_Enable()
138 if((DLYBx->CFGR & lng_mask ) == 0U) in DelayBlock_Enable()
153 DLYBx->CR = 0U; in DelayBlock_Enable()
154 DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN; in DelayBlock_Enable()
155 DLYBx->CFGR = sel | (unit << DLYB_CFGR_UNIT_Pos); in DelayBlock_Enable()
156 DLYBx->CR = DLYB_CR_DEN; in DelayBlock_Enable()
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/hal_stm32-2.7.6/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_ll_delayblock.c95 HAL_StatusTypeDef DelayBlock_Enable(DLYB_TypeDef *DLYBx) in DelayBlock_Enable() argument
99 assert_param(IS_DLYB_ALL_INSTANCE(DLYBx)); in DelayBlock_Enable()
101 DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN; in DelayBlock_Enable()
106 DLYBx->CFGR = 12 | (i << 8); in DelayBlock_Enable()
108 if(((DLYBx->CFGR & DLYB_CFGR_LNGF) != 0) in DelayBlock_Enable()
109 && ((DLYBx->CFGR & DLYB_CFGR_LNG) != 0) in DelayBlock_Enable()
110 && ((DLYBx->CFGR & DLYB_CFGR_LNG) != (DLYB_CFGR_LNG_11 | DLYB_CFGR_LNG_10))) in DelayBlock_Enable()
121 lng = (DLYBx->CFGR & DLYB_CFGR_LNG) >> 16; in DelayBlock_Enable()
129 MODIFY_REG(DLYBx->CFGR, DLYB_CFGR_SEL, ((N/2)+1)); in DelayBlock_Enable()
132 DLYBx->CR = DLYB_CR_DEN; in DelayBlock_Enable()
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/hal_stm32-2.7.6/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dlyb.h100 __STATIC_INLINE void LL_DLYB_Enable(DLYB_TypeDef *DLYBx) in LL_DLYB_Enable() argument
102 SET_BIT(DLYBx->CR, DLYB_CR_DEN); in LL_DLYB_Enable()
110 __STATIC_INLINE void LL_DLYB_Disable(DLYB_TypeDef *DLYBx) in LL_DLYB_Disable() argument
112 CLEAR_BIT(DLYBx->CR, DLYB_CR_DEN); in LL_DLYB_Disable()
124 void LL_DLYB_SetDelay(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg);
125 void LL_DLYB_GetDelay(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg);
126 uint32_t LL_DLYB_GetClockPeriod(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg);
/hal_stm32-2.7.6/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_delayblock.h66 HAL_StatusTypeDef DelayBlock_Enable(DLYB_TypeDef *DLYBx);
67 HAL_StatusTypeDef DelayBlock_Disable(DLYB_TypeDef *DLYBx);
68 HAL_StatusTypeDef DelayBlock_Configure(DLYB_TypeDef *DLYBx, uint32_t PhaseSel, uint32_t Units);