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Searched refs:APB1ENR2 (Results 1 – 25 of 60) sorted by relevance

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/hal_stm32-2.7.6/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h1077 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1079 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1125 … SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
1127 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
1133 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
1135 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
1141 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM3EN); \
1143 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM3EN); \
1149 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_FDCAN1EN); \
1151 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_FDCAN1EN); \
[all …]
Dstm32l5xx_ll_bus.h919 SET_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
921 tmpreg = READ_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1000 return ((READ_BIT(RCC->APB1ENR2, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClock()
1080 CLEAR_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_DisableClock()
/hal_stm32-2.7.6/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1378 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1380 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1386 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_DTSEN); \
1388 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_DTSEN); \
1394 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
1396 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
1402 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_FDCAN1EN); \
1404 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_FDCAN1EN); \
1410 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_UCPD1EN); \
1412 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_UCPD1EN); \
[all …]
Dstm32u5xx_ll_bus.h1461 SET_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1463 tmpreg = READ_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1524 return ((READ_BIT(RCC->APB1ENR2, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClock()
1584 CLEAR_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_DisableClock()
/hal_stm32-2.7.6/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1238 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1240 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1321 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
1323 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
1330 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \
1332 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \
1339 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
1341 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
1405 #define __HAL_RCC_I2C4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN)
1434 #define __HAL_RCC_LPUART1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN)
[all …]
Dstm32l4xx_ll_bus.h1116 SET_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1118 tmpreg = READ_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1203 return ((READ_BIT(RCC->APB1ENR2, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClock()
1287 CLEAR_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_DisableClock()
/hal_stm32-2.7.6/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_bus.h940 SET_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
942 tmpreg = READ_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1017 return ((READ_BIT(RCC->APB1ENR2, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClock()
1091 CLEAR_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_DisableClock()
Dstm32g4xx_hal_rcc.h988 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
990 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
997 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
999 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN); \
1006 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_UCPD1EN); \
1008 … tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_UCPD1EN); \
1064 #define __HAL_RCC_LPUART1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN)
1067 #define __HAL_RCC_I2C4_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_I2C4EN)
1070 #define __HAL_RCC_UCPD1_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_UCPD1EN)
1437 #define __HAL_RCC_LPUART1_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN) != …
[all …]
/hal_stm32-2.7.6/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_bus.h962 SET_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
964 tmpreg = READ_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
1011 return ((READ_BIT(RCC->APB1ENR2, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClock()
1056 CLEAR_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_DisableClock()
/hal_stm32-2.7.6/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_bus.h938 SET_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
940 tmpreg = READ_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_EnableClock()
989 return ((READ_BIT(RCC->APB1ENR2, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP2_IsEnabledClock()
1036 CLEAR_BIT(RCC->APB1ENR2, Periphs); in LL_APB1_GRP2_DisableClock()
/hal_stm32-2.7.6/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h539 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
Dstm32wle5xx.h539 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
Dstm32wl54xx.h680 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
Dstm32wl55xx.h680 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
/hal_stm32-2.7.6/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h416 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
Dstm32wb30xx.h415 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
Dstm32wb35xx.h467 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
/hal_stm32-2.7.6/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h524 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
Dstm32l422xx.h525 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
/hal_stm32-2.7.6/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h397 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
Dstm32wb15xx.h407 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
/hal_stm32-2.7.6/stm32cube/stm32g4xx/soc/
Dstm32gbk1cb.h600 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
Dstm32g431xx.h601 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
Dstm32g441xx.h602 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member
Dstm32g4a1xx.h635 …__IO uint32_t APB1ENR2; /*!< RCC APB1 peripheral clocks enable register 2, … member

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