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Searched refs:ADC_CFGR_EXTEN (Results 1 – 25 of 129) sorted by relevance

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/hal_stm32-2.7.6/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_adc.h130 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * …
3182 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3221 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3225 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2UL… in LL_ADC_REG_GetTriggerSource()
3231 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN) in LL_ADC_REG_GetTriggerSource()
3248 …return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1U… in LL_ADC_REG_IsTriggerSourceSWStart()
3268 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
3283 return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
Dstm32l4xx_hal_adc_ex.h340 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
347 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
/hal_stm32-2.7.6/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_adc.h130 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * …
3007 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3046 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3050 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2UL… in LL_ADC_REG_GetTriggerSource()
3056 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN) in LL_ADC_REG_GetTriggerSource()
3073 …return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1U… in LL_ADC_REG_IsTriggerSourceSWStart()
3093 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
3108 return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
Dstm32l5xx_hal_adc_ex.h340 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
347 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
/hal_stm32-2.7.6/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_adc.h145 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * …
3115 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3157 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3161 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2UL… in LL_ADC_REG_GetTriggerSource()
3167 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN) in LL_ADC_REG_GetTriggerSource()
3184 …return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1U… in LL_ADC_REG_IsTriggerSourceSWStart()
3204 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
3219 return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
Dstm32mp1xx_hal_adc_ex.h350 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | |\
/hal_stm32-2.7.6/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_adc.c589 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
857 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
876 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
/hal_stm32-2.7.6/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_adc.c589 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
857 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
876 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
/hal_stm32-2.7.6/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h143 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * …
3404 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3456 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3460 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2UL… in LL_ADC_REG_GetTriggerSource()
3466 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN) in LL_ADC_REG_GetTriggerSource()
3487 …return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1U… in LL_ADC_REG_IsTriggerSourceSWStart()
3511 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
3530 return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
Dstm32wbxx_hal_adc_ex.h277 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
/hal_stm32-2.7.6/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_adc.h130 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * …
3657 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3723 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3727 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2UL… in LL_ADC_REG_GetTriggerSource()
3733 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN) in LL_ADC_REG_GetTriggerSource()
3750 …return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1U… in LL_ADC_REG_IsTriggerSourceSWStart()
3770 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
3785 return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
Dstm32g4xx_hal_adc_ex.h377 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
/hal_stm32-2.7.6/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_ll_adc.c606 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_RES in LL_ADC_DeInit()
880 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
898 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
Dstm32mp1xx_hal_adc.c324ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL)) /*!< ADC_CFGR fields of parameters that can be updated when no…
784 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | in HAL_ADC_DeInit()
/hal_stm32-2.7.6/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_adc.c615 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_RES in LL_ADC_DeInit()
927 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
945 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
Dstm32h7xx_hal_adc.c329ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL)) /*!< ADC_CFGR fields of parameters that can be updated
336ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL)) /*!< ADC_CFGR fields of parameters that can be updated
926 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | in HAL_ADC_DeInit()
/hal_stm32-2.7.6/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_adc.c688 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
1045 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
1064 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
/hal_stm32-2.7.6/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_adc.h143 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * …
3732 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3776 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3780 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2UL… in LL_ADC_REG_GetTriggerSource()
3786 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN) in LL_ADC_REG_GetTriggerSource()
3803 …return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1U… in LL_ADC_REG_IsTriggerSourceSWStart()
3823 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
3838 return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
Dstm32h7xx_hal_adc_ex.h375 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\
/hal_stm32-2.7.6/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_adc.h137 #define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN) << (4U * …
3217 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3296 uint32_t TriggerSource = READ_BIT(ADCx->CFGR, ADC_CFGR_EXTSEL | ADC_CFGR_EXTEN); in LL_ADC_REG_GetTriggerSource()
3300 …uint32_t ShiftExten = ((TriggerSource & ADC_CFGR_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U)… in LL_ADC_REG_GetTriggerSource()
3306 | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR_EXTEN) in LL_ADC_REG_GetTriggerSource()
3323 return (READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)); in LL_ADC_REG_IsTriggerSourceSWStart()
3343 MODIFY_REG(ADCx->CFGR, ADC_CFGR_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
3358 return (uint32_t)(READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
Dstm32f3xx_hal_adc_ex.h585 #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR_EXTEN)
2189 (((__HANDLE__)->Instance->CFGR & ADC_CFGR_EXTEN) == RESET)
/hal_stm32-2.7.6/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_adc.c950 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
1223 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
1242 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
/hal_stm32-2.7.6/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_adc.c884 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN in LL_ADC_DeInit()
1149 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
1168 | ADC_CFGR_EXTEN in LL_ADC_REG_Init()
Dstm32f3xx_hal_adc_ex.c495 ADC_CFGR_EXTEN | in HAL_ADC_Init()
891 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN | in HAL_ADC_DeInit()
/hal_stm32-2.7.6/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_adc_ex.h438 ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN |\

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