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Searched refs:usartClockMode0 (Results 1 – 2 of 2) sorted by relevance

/hal_silabs-latest/gecko/emlib/inc/
Dem_usart.h181 usartClockMode0 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLELEADING, enumerator
497 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
511 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
528 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
702 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
723 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
747 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_usart.h181 usartClockMode0 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLELEADING, enumerator
497 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
511 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
528 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
702 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
723 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
747 usartClockMode0, /* Clock idle low, sample on rising edge. */ \