Searched refs:pll_mode (Results 1 – 3 of 3) sorted by relevance
1469 uint8_t pll_mode; member1694 uint8_t pll_mode; member
503 sl_si91x_feature_frame_request feature_frame_request = { .pll_mode = PLL_MODE, in sl_si91x_driver_init()515 feature_frame_request.pll_mode = 1; in sl_si91x_driver_init()517 feature_frame_request.pll_mode = 0; in sl_si91x_driver_init()
947 …pll_mode; ///< PLL Mode. 0 - less than 120 Mhz NWP SoC clock; 1 - greater than 120 Mhz NWP SoC clo… member
