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Searched refs:pin (Results 1 – 25 of 54) sorted by relevance

123

/hal_silabs-latest/simplicity_sdk/platform/service/device_manager/src/
Dsl_device_gpio.c40 const sl_gpio_t pa0 = { .port = SL_GPIO_PORT_A, .pin = 0 };
41 const sl_gpio_t pa1 = { .port = SL_GPIO_PORT_A, .pin = 1 };
42 const sl_gpio_t pa2 = { .port = SL_GPIO_PORT_A, .pin = 2 };
43 const sl_gpio_t pa3 = { .port = SL_GPIO_PORT_A, .pin = 3 };
44 const sl_gpio_t pa4 = { .port = SL_GPIO_PORT_A, .pin = 4 };
45 const sl_gpio_t pa5 = { .port = SL_GPIO_PORT_A, .pin = 5 };
46 const sl_gpio_t pa6 = { .port = SL_GPIO_PORT_A, .pin = 6 };
47 const sl_gpio_t pa7 = { .port = SL_GPIO_PORT_A, .pin = 7 };
48 const sl_gpio_t pa8 = { .port = SL_GPIO_PORT_A, .pin = 8 };
49 const sl_gpio_t pa9 = { .port = SL_GPIO_PORT_A, .pin = 9 };
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/src/
Dsl_si91x_peripheral_gpio.c44 extern __INLINE void sl_gpio_set_pin_output(sl_gpio_port_t port, uint8_t pin);
45 extern __INLINE void sl_gpio_clear_pin_output(sl_gpio_port_t port, uint8_t pin);
60 void sl_gpio_configure_interrupt(sl_gpio_port_t port, uint8_t pin, uint32_t int_no, sl_gpio_interru… in sl_gpio_configure_interrupt() argument
63 SL_GPIO_ASSERT(SL_GPIO_NDEBUG_PORT_PIN(port, pin)); in sl_gpio_configure_interrupt()
67 GPIO->INTR[int_no].GPIO_INTR_CTRL_b.PIN_NUMBER = (sl_si91x_gpio_pin_t)pin; in sl_gpio_configure_interrupt()
119 void sl_gpio_set_pin_mode(sl_gpio_port_t port, uint8_t pin, sl_gpio_mode_t mode, uint32_t output_va… in sl_gpio_set_pin_mode() argument
126 sl_gpio_set_pin_output(port, pin); // Set the GPIO pin in sl_gpio_set_pin_mode()
128 sl_gpio_clear_pin_output(port, pin); // Clear the GPIO pin in sl_gpio_set_pin_mode()
134 ULP_GPIO->PIN_CONFIG[pin].GPIO_CONFIG_REG_b.MODE = mode; // Set mode in ULP GPIO instance in sl_gpio_set_pin_mode()
140 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].GPIO_CONFIG_REG_b.MODE = mode; in sl_gpio_set_pin_mode()
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_api/src/
Dsl_si91x_driver_gpio.c205 if (m4_gpio_pad[(pin_config.port_pin.port * MAX_GPIO_PORT_PIN) + pin_config.port_pin.pin] in sl_gpio_set_configuration()
208 …if (m4_gpio_pad[(pin_config.port_pin.port * MAX_GPIO_PORT_PIN) + pin_config.port_pin.pin] != PAD_S… in sl_gpio_set_configuration()
209 if (SL_GPIO_VALIDATE_HOST_PIN(pin_config.port_pin.port, pin_config.port_pin.pin)) { in sl_gpio_set_configuration()
211 … m4_gpio_pad[(pin_config.port_pin.port * MAX_GPIO_PORT_PIN) + pin_config.port_pin.pin]); in sl_gpio_set_configuration()
217 … m4_gpio_pad[(pin_config.port_pin.port * MAX_GPIO_PORT_PIN) + pin_config.port_pin.pin]); in sl_gpio_set_configuration()
226 status = sl_si91x_gpio_driver_enable_pad_receiver(pin_config.port_pin.pin); in sl_gpio_set_configuration()
232 + pin_config.port_pin.pin); in sl_gpio_set_configuration()
243 pin_config.port_pin.pin, in sl_gpio_set_configuration()
252 status = sl_si91x_gpio_driver_enable_pad_selection(ulp_gpio_pad[pin_config.port_pin.pin]); in sl_gpio_set_configuration()
257 status = sl_si91x_gpio_driver_enable_ulp_pad_receiver(pin_config.port_pin.pin); in sl_gpio_set_configuration()
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/hal_silabs-latest/gecko/emlib/src/
Dem_gpio.c178 unsigned int pin, in GPIO_ExtIntConfig() argument
188 (void)pin; in GPIO_ExtIntConfig()
191 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); in GPIO_ExtIntConfig()
193 EFM_ASSERT(GPIO_INTNO_PIN_VALID(intNo, pin)); in GPIO_ExtIntConfig()
230 (uint32_t)((pin % 4) & _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK) in GPIO_ExtIntConfig()
237 (uint32_t)((pin % 4) & _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK) in GPIO_ExtIntConfig()
244 (uint32_t)((pin % 4) & _GPIO_EXTIPINSELH_EXTIPINSEL0_MASK) in GPIO_ExtIntConfig()
303 unsigned int pin, in GPIO_EM4WUExtIntConfig() argument
308 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); in GPIO_EM4WUExtIntConfig()
311 GPIO_PinModeSet(port, pin, gpioModeInputPullFilter, (unsigned int)!polarity); in GPIO_EM4WUExtIntConfig()
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Dem_dbg.c93 int pin; in DBG_SWOEnable() local
98 pin = GPIO_SWV_PIN; in DBG_SWOEnable()
104 pin = AF_DBG_SWO_PIN(location); in DBG_SWOEnable()
107 pin = AF_DBG_SWV_PIN(location); in DBG_SWOEnable()
115 if ((pin < 0) || (port < 0)) { in DBG_SWOEnable()
130 GPIO_PinModeSet((GPIO_Port_TypeDef)port, pin, gpioModePushPull, 0); in DBG_SWOEnable()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_gpio.c178 unsigned int pin, in GPIO_ExtIntConfig() argument
188 (void)pin; in GPIO_ExtIntConfig()
191 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); in GPIO_ExtIntConfig()
193 EFM_ASSERT(GPIO_INTNO_PIN_VALID(intNo, pin)); in GPIO_ExtIntConfig()
230 (uint32_t)((pin % 4) & _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK) in GPIO_ExtIntConfig()
237 (uint32_t)((pin % 4) & _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK) in GPIO_ExtIntConfig()
244 (uint32_t)((pin % 4) & _GPIO_EXTIPINSELH_EXTIPINSEL0_MASK) in GPIO_ExtIntConfig()
303 unsigned int pin, in GPIO_EM4WUExtIntConfig() argument
308 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); in GPIO_EM4WUExtIntConfig()
311 GPIO_PinModeSet(port, pin, gpioModeInputPullFilter, (unsigned int)!polarity); in GPIO_EM4WUExtIntConfig()
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Dem_dbg.c90 int pin; in DBG_SWOEnable() local
95 pin = GPIO_SWV_PIN; in DBG_SWOEnable()
101 pin = AF_DBG_SWO_PIN(location); in DBG_SWOEnable()
104 pin = AF_DBG_SWV_PIN(location); in DBG_SWOEnable()
112 if ((pin < 0) || (port < 0)) { in DBG_SWOEnable()
127 GPIO_PinModeSet((GPIO_Port_TypeDef)port, pin, gpioModePushPull, 0); in DBG_SWOEnable()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/rom_driver/inc/
Drsi_rom_egpio.h68 STATIC INLINE void RSI_EGPIO_SetDir(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin, boolean_t dir) in RSI_EGPIO_SetDir() argument
71 ROMAPI_EGPIO_API->egpio_set_dir(pEGPIO, port, pin, dir); in RSI_EGPIO_SetDir()
73 egpio_set_dir(pEGPIO, port, pin, dir); in RSI_EGPIO_SetDir()
89 STATIC INLINE void RSI_EGPIO_SetPin(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin, uint8_t val) in RSI_EGPIO_SetPin() argument
92 ROMAPI_EGPIO_API->egpio_set_pin(pEGPIO, port, pin, val); in RSI_EGPIO_SetPin()
94 egpio_set_pin(pEGPIO, port, pin, val); in RSI_EGPIO_SetPin()
106 STATIC INLINE boolean_t RSI_EGPIO_GetPin(const EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin) in RSI_EGPIO_GetPin() argument
109 return ROMAPI_EGPIO_API->egpio_get_pin(pEGPIO, port, pin); in RSI_EGPIO_GetPin()
111 return egpio_get_pin(pEGPIO, port, pin); in RSI_EGPIO_GetPin()
123 STATIC INLINE boolean_t RSI_EGPIO_GetDir(const EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin) in RSI_EGPIO_GetDir() argument
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Drsi_rom_table_si91x.h78 void (*egpio_set_dir)(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin, boolean_t dir);
79 void (*egpio_set_pin)(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin, uint8_t val);
80 boolean_t (*egpio_get_pin)(const EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin);
81 boolean_t (*egpio_get_dir)(const EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin);
82 void (*egpio_pin_int_sel)(EGPIO_Type *pEGPIO, uint8_t intCh, uint8_t port, uint8_t pin);
95 void (*egpio_set_pin_mux)(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin, uint8_t mux);
97 void (*egpio_set_port_mask)(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin);
98 void (*egpio_set_port_un_mask)(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin);
102 void (*egpio_word_load)(EGPIO_Type *pEGPIO, uint8_t pin, uint16_t val);
106 void (*egpio_group_int_one_enable)(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin);
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/inc/
Dsl_si91x_peripheral_gpio.h104 #define SL_GPIO_PORT_PIN_VALID(port, pin) \ argument
105 ((((_GPIO_PORT_MASK(port)) >> (pin)) & 0x1UL) == 0x1UL) ///< Validating GPIO port and pin
246 void sl_gpio_configure_interrupt(sl_gpio_port_t port, uint8_t pin, uint32_t int_no, sl_gpio_interru…
267 void sl_gpio_set_pin_mode(sl_gpio_port_t port, uint8_t pin, sl_gpio_mode_t mode, uint32_t output_va…
288 sl_gpio_mode_t sl_gpio_get_pin_mode(sl_gpio_port_t port, uint8_t pin);
308 static __INLINE void sl_gpio_set_pin_output(sl_gpio_port_t port, uint8_t pin) in sl_gpio_set_pin_output() argument
312 SL_GPIO_ASSERT(SL_GPIO_NDEBUG_PORT_PIN(port, pin)); in sl_gpio_set_pin_output()
313 GPIO->PIN_CONFIG[(port * MAX_GPIO_PORT_PIN) + pin].BIT_LOAD_REG = SET; in sl_gpio_set_pin_output()
315 SL_GPIO_ASSERT(SL_GPIO_VALIDATE_ULP_PORT_PIN(port, pin)); in sl_gpio_set_pin_output()
316 ULP_GPIO->PIN_CONFIG[pin].BIT_LOAD_REG = SET; in sl_gpio_set_pin_output()
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Dsl_si91x_gpio.h265 void sl_si91x_gpio_set_pin_direction(uint8_t port, uint8_t pin, sl_si91x_gpio_direction_t direction…
287 uint8_t sl_si91x_gpio_get_pin_direction(uint8_t port, uint8_t pin);
484 uint8_t pin);
515 uint8_t pin,
650 …gpio_enable_group_interrupt(sl_si91x_group_interrupt_t group_interrupt, uint8_t port, uint8_t pin);
676 …pio_disable_group_interrupt(sl_si91x_group_interrupt_t group_interrupt, uint8_t port, uint8_t pin);
752 sl_si91x_gpio_pin_ulp_t pin);
763 void sl_si91x_gpio_set_uulp_npss_pin_mux(uint8_t pin, sl_si91x_uulp_npss_mode_t mode);
775 void sl_si91x_gpio_select_uulp_npss_receiver(uint8_t pin, sl_si91x_gpio_receiver_t receiver);
789 void sl_si91x_gpio_set_uulp_npss_direction(uint8_t pin, sl_si91x_gpio_direction_t direction);
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Dsl_si91x_gpio_common.h139 #define SL_GPIO_NDEBUG_PORT_PIN(port, pin) \ argument
140 (port == 0 ? ((pin > GPIO_PA_PIN_MAX_VALIDATE) ? 0 : 1) \
141 : port == 1 ? ((pin > GPIO_PB_PIN_MAX_VALIDATE) ? 0 : 1) \
142 : port == 2 ? ((pin > GPIO_PC_PIN_MAX_VALIDATE) ? 0 : 1) \
143 : port == 3 ? ((pin > GPIO_PD_PIN_MAX_VALIDATE) ? 0 : 1) \
146 #define SL_GPIO_VALIDATE_HOST_PIN(port, pin) … argument
147 …(port == SL_GPIO_PORT_A ? (((pin >= HOST_PAD_MIN) && (pin <= HOST_PAD_MAX)) ? TRUE : FALSE) …
148 …: port == SL_GPIO_PORT_B ? (((pin >= GPIO_PIN_NUMBER9) && (pin <= GPIO_PIN_NUMBER14)) ? TRUE : FAL…
150 #define SL_GPIO_VALIDATE_ULP_PORT_PIN(port, pin) (port == 4 ? ((pin > 11) ? 0 : 1) : 0) ///< Valid… argument
151 #define SL_GPIO_VALIDATE_UULP_PORT_PIN(port, pin) (port == 5 ? ((pin > 5) ? 0 : 1) : 0) ///< Valid… argument
/hal_silabs-latest/simplicity_sdk/platform/peripheral/inc/
Dsl_hal_gpio.h249 #define SL_HAL_GPIO_PORT_PIN_IS_VALID(port, pin) ((((SL_HAL_GPIO_PORT_MASK(port)) >> (pin)) & 0x1UL… argument
265 …define SL_HAL_GPIO_INTNO_PIN_VALID(int_no, pin) (((int_no) & ~_GPIO_EXTIPINSELL_EXTIPINSEL0_MAS… argument
420 EFM_ASSERT(SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)); in SL_CODE_CLASSIFY()
422 GPIO->P_SET[gpio->port].DOUT = 1UL << gpio->pin; in SL_CODE_CLASSIFY()
525 EFM_ASSERT(SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)); in sl_hal_gpio_clear_pin()
527 GPIO->P_CLR[gpio->port].DOUT = 1UL << gpio->pin; in sl_hal_gpio_clear_pin()
554 EFM_ASSERT(SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)); in sl_hal_gpio_get_pin_input()
556 bool pin_input = ((GPIO->P[gpio->port].DIN) >> gpio->pin) & 1UL; in sl_hal_gpio_get_pin_input()
571 EFM_ASSERT(SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)); in sl_hal_gpio_get_pin_output()
573 bool pin_output = ((GPIO->P[gpio->port].DOUT) >> gpio->pin) & 1UL; in sl_hal_gpio_get_pin_output()
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_retention.h103 STATIC INLINE void RSI_NPSSGPIO_SetPinMux(uint8_t pin, uint8_t mux) in RSI_NPSSGPIO_SetPinMux() argument
105 MCU_RET->NPSS_GPIO_CNTRL[pin].NPSS_GPIO_CTRLS_b.NPSS_GPIO_MODE = (unsigned int)(mux & 0x07); in RSI_NPSSGPIO_SetPinMux()
117 STATIC INLINE void RSI_NPSSGPIO_InputBufferEn(uint8_t pin, boolean_t enable) in RSI_NPSSGPIO_InputBufferEn() argument
119 MCU_RET->NPSS_GPIO_CNTRL[pin].NPSS_GPIO_CTRLS_b.NPSS_GPIO_REN = (unsigned int)(enable & 0x01); in RSI_NPSSGPIO_InputBufferEn()
130 STATIC INLINE void RSI_NPSSGPIO_SetDir(uint8_t pin, boolean_t dir) in RSI_NPSSGPIO_SetDir() argument
132 MCU_RET->NPSS_GPIO_CNTRL[pin].NPSS_GPIO_CTRLS_b.NPSS_GPIO_OEN = (unsigned int)(dir & 0x01); in RSI_NPSSGPIO_SetDir()
140 STATIC INLINE boolean_t RSI_NPSSGPIO_GetDir(uint8_t pin) in RSI_NPSSGPIO_GetDir() argument
142 return MCU_RET->NPSS_GPIO_CNTRL[pin].NPSS_GPIO_CTRLS_b.NPSS_GPIO_OEN; in RSI_NPSSGPIO_GetDir()
151 STATIC INLINE void RSI_NPSSGPIO_SetPin(uint8_t pin, boolean_t val) in RSI_NPSSGPIO_SetPin() argument
153 MCU_RET->NPSS_GPIO_CNTRL[pin].NPSS_GPIO_CTRLS_b.NPSS_GPIO_OUT = (unsigned int)(val & 0x01); in RSI_NPSSGPIO_SetPin()
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_api/inc/
Dsl_si91x_driver_gpio.h91 sl_status_t sl_si91x_gpio_driver_set_pin_direction(uint8_t port, uint8_t pin, sl_si91x_gpio_directi…
116 uint8_t sl_si91x_gpio_driver_get_pin_direction(uint8_t port, uint8_t pin);
377 uint8_t pin);
417 uint8_t pin,
588 uint8_t pin);
622 uint8_t pin);
738 sl_si91x_gpio_pin_ulp_t pin,
756 sl_status_t sl_si91x_gpio_driver_set_uulp_npss_pin_mux(uint8_t pin, sl_si91x_uulp_npss_mode_t mode);
774 sl_status_t sl_si91x_gpio_driver_select_uulp_npss_receiver(uint8_t pin, sl_si91x_gpio_receiver_t re…
794 sl_status_t sl_si91x_gpio_driver_set_uulp_npss_direction(uint8_t pin, sl_si91x_gpio_direction_t dir…
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Dsl_driver_gpio.h72 uint8_t pin; ///< GPIO pin number member
359 if (gpio->pin > PORTA_PIN_MAX_VALUE) { in sl_gpio_validation()
366 if (gpio->pin > PORT_PIN_MAX_VALUE) { in sl_gpio_validation()
373 if (gpio->pin > PORTD_PIN_MAX_VALUE) { in sl_gpio_validation()
380 if (gpio->pin > ULP_PIN_MAX_VALUE) { in sl_gpio_validation()
387 if (gpio->pin > UULP_PIN_MAX_VALUE) { in sl_gpio_validation()
436 sl_gpio_set_pin_output(gpio->port, gpio->pin); in sl_gpio_driver_set_pin()
482 sl_gpio_clear_pin_output(gpio->port, gpio->pin); in sl_gpio_driver_clear_pin()
528 sl_gpio_toggle_pin_output(gpio->port, gpio->pin); in sl_gpio_driver_toggle_pin()
576 *pin_value = sl_gpio_get_pin_input(gpio->port, gpio->pin); in sl_gpio_driver_get_pin()
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/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_gpio.h472 #define GPIO_PORT_PIN_VALID(port, pin) ((((_GPIO_PORT_MASK(port)) >> (pin)) & 0x1UL) == 0x1UL) argument
476 #define GPIO_INTNO_PIN_VALID(intNo, pin) \ argument
478 == ((pin) & ~_GPIO_EXTIPINSELL_EXTIPINSEL0_MASK))
883 unsigned int pin,
891 unsigned int pin,
1058 unsigned int pin) in GPIO_PinInGet() argument
1060 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); in GPIO_PinInGet()
1061 return BUS_RegBitRead(&GPIO->P[port].DIN, pin); in GPIO_PinInGet()
1076 __STATIC_INLINE void GPIO_PinLock(GPIO_Port_TypeDef port, unsigned int pin) in GPIO_PinLock() argument
1078 BUS_RegBitWrite(&GPIO->P[port].PINLOCKN, pin, 0); in GPIO_PinLock()
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Dem_iadc.h1364 uint8_t pin) in IADC_portPinToNegInput() argument
1366 uint32_t input = (((uint32_t) port + _IADC_SCAN_PORTNEG_PORTA) << 4) | pin; in IADC_portPinToNegInput()
1385 uint8_t pin) in IADC_portPinToPosInput() argument
1387 uint32_t input = (((uint32_t) port + _IADC_SCAN_PORTPOS_PORTA) << 4) | pin; in IADC_portPinToPosInput()
/hal_silabs-latest/gecko/emlib/inc/
Dem_gpio.h424 #define GPIO_PORT_PIN_VALID(port, pin) ((((_GPIO_PORT_MASK(port)) >> (pin)) & 0x1UL) == 0x1UL) argument
428 #define GPIO_INTNO_PIN_VALID(intNo, pin) \ argument
430 == ((pin) & ~_GPIO_EXTIPINSELL_EXTIPINSEL0_MASK))
798 unsigned int pin,
806 unsigned int pin,
973 unsigned int pin) in GPIO_PinInGet() argument
975 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); in GPIO_PinInGet()
976 return BUS_RegBitRead(&GPIO->P[port].DIN, pin); in GPIO_PinInGet()
991 __STATIC_INLINE void GPIO_PinLock(GPIO_Port_TypeDef port, unsigned int pin) in GPIO_PinLock() argument
993 BUS_RegBitWrite(&GPIO->P[port].PINLOCKN, pin, 0); in GPIO_PinLock()
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/hal_silabs-latest/simplicity_sdk/platform/peripheral/src/
Dsl_hal_gpio.c70 extern __INLINE int32_t sl_hal_gpio_get_external_interrupt_number(uint8_t pin,
89 EFM_ASSERT(SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)); in sl_hal_gpio_set_pin_mode()
194 if (gpio->pin < 8) { in sl_hal_gpio_set_pin_mode()
195 …reg_write_mask(&(GPIO->P[gpio->port].MODEL), 0xFu << (gpio->pin * 4), gpio_mode << (gpio->pin * 4)… in sl_hal_gpio_set_pin_mode()
197 …write_mask(&(GPIO->P[gpio->port].MODEH), 0xFu << ((gpio->pin - 8) * 4), gpio_mode << ((gpio->pin -… in sl_hal_gpio_set_pin_mode()
218 EFM_ASSERT(SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)); in sl_hal_gpio_get_pin_mode()
221 if (gpio->pin < 8) { in sl_hal_gpio_get_pin_mode()
222 mode = (sl_gpio_mode_t) ((GPIO->P[gpio->port].MODEL >> (gpio->pin * 4)) & 0xF); in sl_hal_gpio_get_pin_mode()
224 mode = (sl_gpio_mode_t) ((GPIO->P[gpio->port].MODEH >> ((gpio->pin - 8) * 4)) & 0xF); in sl_hal_gpio_get_pin_mode()
306 EFM_ASSERT(SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)); in sl_hal_gpio_configure_external_interrupt()
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/
Drsi_egpio.h186 void egpio_set_dir(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin, boolean_t dir);
188 void egpio_set_pin(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin, uint8_t val);
190 boolean_t egpio_get_pin(const EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin);
192 boolean_t egpio_get_dir(const EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin);
194 void egpio_pin_int_sel(EGPIO_Type *pEGPIO, uint8_t intCh, uint8_t port, uint8_t pin);
220 void egpio_set_pin_mux(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin, uint8_t u8Mux);
224 void egpio_set_port_mask(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin);
226 void egpio_set_port_un_mask(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin);
234 void egpio_word_load(EGPIO_Type *pEGPIO, uint8_t pin, uint16_t val);
242 void egpio_group_int_one_enable(EGPIO_Type *pEGPIO, uint8_t port, uint8_t pin);
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/hal_silabs-latest/simplicity_sdk/platform/driver/gpio/src/
Dsl_gpio.c114 …if (!SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin) || !SL_GPIO_DIRECTION_IS_VALID(pin_direc… in sl_gpio_set_pin_direction()
148 if (!SL_HAL_GPIO_MODE_IS_VALID(mode) || !SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)) { in sl_gpio_set_pin_mode()
177 if (!SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)) { in sl_gpio_get_pin_config()
229 if (!SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)) { in sl_gpio_set_pin()
253 if (!SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)) { in sl_gpio_clear_pin()
277 if (!SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)) { in sl_gpio_toggle_pin()
302 if (!SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)) { in sl_gpio_get_pin_output()
327 if (!SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin)) { in sl_gpio_get_pin_input()
449 …if (!SL_HAL_GPIO_PORT_PIN_IS_VALID(gpio->port, gpio->pin) && (gpio->port != SL_GPIO_PORT_INTERRUPT… in sl_gpio_configure_external_interrupt()
466 *int_no = sl_hal_gpio_get_external_interrupt_number(gpio->pin, enabled_interrupts); in sl_gpio_configure_external_interrupt()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/service/clock_manager/src/
Dsl_clock_manager_init_hal_s2.c201 unsigned int pin = SL_CLOCK_MANAGER_HFXO_CRYSTAL_SHARING_GPIO_PIN; in init_hfxo() local
210 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); in init_hfxo()
238 GPIO_PinModeSet(port, pin, gpioModeWiredOrPullDown, 0U); in init_hfxo()
240 …(&(GPIO->PRSROUTE[0].ASYNCH0ROUTE))[HFXO_CRYSTSAL_SHARING_PRS_CHANNEL] = pin << _GPIO_PRS_ASYNCH0R… in init_hfxo()
246 EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin)); in init_hfxo()
249 GPIO_PinModeSet(port, pin, gpioModeInput, 0U); in init_hfxo()
251 GPIO->SYXOROUTE[0].BUFOUTREQINASYNCROUTE = pin << _GPIO_SYXO_BUFOUTREQINASYNCROUTE_PIN_SHIFT in init_hfxo()
350 | (clkin0_gpio.pin << _GPIO_CMU_CLKIN0ROUTE_PIN_SHIFT); in init_clkin0()
Dsl_clock_manager.c119 uint32_t pin) in sl_clock_manager_set_gpio_clock_output() argument
121 …ck_manager_hal_set_gpio_clock_output(export_clock_source, output_select, hfexp_divider, port, pin); in sl_clock_manager_set_gpio_clock_output()
/hal_silabs-latest/scripts/
Dgen_adc.py129 for pin in range(16):
130 insert(values, f"P{port[4]}{pin}", port_base + pin)

123