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Searched refs:pULPCLK (Results 1 – 6 of 6) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ulpss_clk.c73 rsi_error_t ulpss_ulp_peri_clk_enable(ULPCLK_Type *pULPCLK, uint32_t u32Flags) in ulpss_ulp_peri_clk_enable() argument
75 if (pULPCLK == NULL) { in ulpss_ulp_peri_clk_enable()
78 pULPCLK->ULP_MISC_SOFT_SET_REG = (pULPCLK->ULP_MISC_SOFT_SET_REG | u32Flags) & 0xFFFFFFFF; in ulpss_ulp_peri_clk_enable()
91 rsi_error_t ulpss_ulp_peri_clk_disable(ULPCLK_Type *pULPCLK, uint32_t u32Flags) in ulpss_ulp_peri_clk_disable() argument
93 if (pULPCLK == NULL) { in ulpss_ulp_peri_clk_disable()
96 pULPCLK->ULP_MISC_SOFT_SET_REG = (pULPCLK->ULP_MISC_SOFT_SET_REG & ~u32Flags) & 0xFFFFFFFF; in ulpss_ulp_peri_clk_disable()
109 rsi_error_t ulpss_ulp_dyn_clk_enable(ULPCLK_Type *pULPCLK, uint32_t u32Flags) in ulpss_ulp_dyn_clk_enable() argument
111 if (pULPCLK == NULL) { in ulpss_ulp_dyn_clk_enable()
114 pULPCLK->ULP_DYN_CLK_CTRL_DISABLE = (pULPCLK->ULP_DYN_CLK_CTRL_DISABLE | u32Flags) & 0xFFFFFFFF; in ulpss_ulp_dyn_clk_enable()
127 rsi_error_t ulpss_ulp_dyn_clk_disable(ULPCLK_Type *pULPCLK, uint32_t u32Flags) in ulpss_ulp_dyn_clk_disable() argument
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/rom_driver/inc/
Drsi_rom_ulpss_clk.h127 STATIC INLINE rsi_error_t RSI_ULPSS_UlpProcClkConfig(ULPCLK_Type *pULPCLK, in RSI_ULPSS_UlpProcClkConfig() argument
132 return ulpss_ulp_proc_clk_config(pULPCLK, clkSource, divFactor, delayFn); in RSI_ULPSS_UlpProcClkConfig()
169 STATIC INLINE rsi_error_t RSI_ULPSS_UlpPeriClkEnable(ULPCLK_Type *pULPCLK, uint32_t u32Flags) in RSI_ULPSS_UlpPeriClkEnable() argument
172 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_peri_clk_enable(pULPCLK, u32Flags); in RSI_ULPSS_UlpPeriClkEnable()
174 return ulpss_ulp_peri_clk_enable(pULPCLK, u32Flags); in RSI_ULPSS_UlpPeriClkEnable()
212 STATIC INLINE rsi_error_t RSI_ULPSS_UlpPeriClkDisable(ULPCLK_Type *pULPCLK, uint32_t u32Flags) in RSI_ULPSS_UlpPeriClkDisable() argument
215 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_peri_clk_disable(pULPCLK, u32Flags); in RSI_ULPSS_UlpPeriClkDisable()
217 return ulpss_ulp_peri_clk_disable(pULPCLK, u32Flags); in RSI_ULPSS_UlpPeriClkDisable()
254 STATIC INLINE rsi_error_t RSI_ULPSS_UlpDynClkEnable(ULPCLK_Type *pULPCLK, uint32_t u32Flags) in RSI_ULPSS_UlpDynClkEnable() argument
257 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_dyn_clk_enable(pULPCLK, u32Flags); in RSI_ULPSS_UlpDynClkEnable()
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Drsi_rom_table_si91x.h96 void (*egpio_ulp_soc_gpio_mode)(ULPCLK_Type *pULPCLK, uint8_t gpio, uint8_t mode);
776 rsi_error_t (*ulpss_ulp_peri_clk_enable)(ULPCLK_Type *pULPCLK, uint32_t u32Flags);
778 rsi_error_t (*ulpss_ulp_peri_clk_disable)(ULPCLK_Type *pULPCLK, uint32_t u32Flags);
780 rsi_error_t (*ulpss_ulp_dyn_clk_enable)(ULPCLK_Type *pULPCLK, uint32_t u32Flags);
782 rsi_error_t (*ulpss_ulp_dyn_clk_disable)(ULPCLK_Type *pULPCLK, uint32_t u32Flags);
784 rsi_error_t (*ulpss_ulp_ssi_clk_config)(ULPCLK_Type *pULPCLK,
789 …rsi_error_t (*ulpss_ulp_i2s_clk_config)(ULPCLK_Type *pULPCLK, ULP_I2S_CLK_SELECT_T clkSource, uint…
791 rsi_error_t (*ulpss_ulp_uar_clk_config)(ULPCLK_Type *pULPCLK,
797 rsi_error_t (*ulpss_time_clk_disable)(ULPCLK_Type *pULPCLK);
798 rsi_error_t (*ulpss_time_clk_config)(ULPCLK_Type *pULPCLK,
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Drsi_rom_egpio.h411 STATIC INLINE void RSI_EGPIO_UlpSocGpioMode(ULPCLK_Type *pULPCLK, uint8_t gpio, uint8_t mode) in RSI_EGPIO_UlpSocGpioMode() argument
414 ROMAPI_EGPIO_API->egpio_ulp_soc_gpio_mode(pULPCLK, gpio, mode); in RSI_EGPIO_UlpSocGpioMode()
416 egpio_ulp_soc_gpio_mode(pULPCLK, gpio, mode); in RSI_EGPIO_UlpSocGpioMode()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_ulpss_clk.h302 rsi_error_t ulpss_ulp_proc_clk_config(ULPCLK_Type *pULPCLK,
310 rsi_error_t ulpss_ulp_proc_clk_config(ULPCLK_Type *pULPCLK,
315 rsi_error_t ulpss_ulp_peri_clk_enable(ULPCLK_Type *pULPCLK, uint32_t u32Flags);
317 rsi_error_t ulpss_ulp_peri_clk_disable(ULPCLK_Type *pULPCLK, uint32_t u32Flags);
319 rsi_error_t ulpss_ulp_dyn_clk_enable(ULPCLK_Type *pULPCLK, uint32_t u32Flags);
321 rsi_error_t ulpss_ulp_dyn_clk_disable(ULPCLK_Type *pULPCLK, uint32_t u32Flags);
323 rsi_error_t ulpss_ulp_ssi_clk_config(ULPCLK_Type *pULPCLK,
328 rsi_error_t ulpss_ulp_i2s_clk_config(ULPCLK_Type *pULPCLK, ULP_I2S_CLK_SELECT_T clkSource, uint16_t…
330 rsi_error_t ulpss_ulp_uar_clk_config(ULPCLK_Type *pULPCLK,
336 rsi_error_t ulpss_time_clk_config(ULPCLK_Type *pULPCLK,
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/inc/
Drsi_egpio.h222 void egpio_ulp_soc_gpio_mode(ULPCLK_Type *pULPCLK, uint8_t gpio, uint8_t mode);