Home
last modified time | relevance | path

Searched refs:odd_div (Results 1 – 1 of 1) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/
Dclock_update.c99 uint32_t odd_div = 0; in RSI_CLK_GetBaseClock() local
397 odd_div = (M4CLK->CLK_CONFIG_REG2_b.QSPI_ODD_DIV_SEL); in RSI_CLK_GetBaseClock()
399 if (odd_div == 0) { in RSI_CLK_GetBaseClock()
413 if (odd_div == 0) { in RSI_CLK_GetBaseClock()
451 odd_div = (M4CLK->CLK_CONFIG_REG2_b.QSPI_ODD_DIV_SEL); in RSI_CLK_GetBaseClock()
453 if (odd_div == 0) { in RSI_CLK_GetBaseClock()
467 if (odd_div == 0) { in RSI_CLK_GetBaseClock()