Searched refs:oddDivFactor (Results 1 – 4 of 4) sorted by relevance
| /hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/rom_driver/inc/ |
| D | rsi_rom_ulpss_clk.h | 102 boolean_t oddDivFactor) in RSI_ULPSS_ClockConfig() argument
105 return ROMAPI_ULPSS_CLK_API->ulpss_clock_config(pCLK, clkEnable, divFactor, oddDivFactor); in RSI_ULPSS_ClockConfig()
107 return ulpss_clock_config(pCLK, clkEnable, divFactor, oddDivFactor); in RSI_ULPSS_ClockConfig()
629 …PSS_ClockConfig(M4CLK_Type *pCLK, boolean_t clkEnable, uint16_t divFactor, boolean_t oddDivFactor);
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| D | rsi_rom_table_si91x.h | 774 …s_clock_config)(M4CLK_Type *pCLK, boolean_t clkEnable, uint16_t divFactor, boolean_t oddDivFactor);
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| /hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/ |
| D | rsi_ulpss_clk.h | 308 …ss_clock_config(M4CLK_Type *pCLK, boolean_t clkEnable, uint16_t divFactor, boolean_t oddDivFactor);
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| /hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/ |
| D | rsi_ulpss_clk.c | 49 …pss_clock_config(M4CLK_Type *pCLK, boolean_t clkEnable, uint16_t divFactor, boolean_t oddDivFactor) in ulpss_clock_config() argument
56 pCLK->CLK_CONFIG_REG5_b.ULPSS_ODD_DIV_SEL = (unsigned int)(oddDivFactor & 0x01); in ulpss_clock_config()
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