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Searched refs:module (Results 1 – 15 of 15) sorted by relevance

/hal_silabs-latest/si32/si32Hal/sim3l1xx/
DSI32_LOCK_A_Type.h228 #define SI32_LOCK_A_lock_module(basePointer, module) \ argument
229 _SI32_LOCK_A_lock_module(basePointer, module)
252 #define SI32_LOCK_A_unlock_module(basePointer, module) \ argument
253 _SI32_LOCK_A_unlock_module(basePointer, module)
275 #define SI32_LOCK_A_is_module_locked(basePointer, module) \ argument
276 _SI32_LOCK_A_is_module_locked(basePointer, module)
DSI32_LOCK_A_Type.c170 SI32_LOCK_A_Enum_Type module) in _SI32_LOCK_A_lock_module() argument
172 assert(module < 32); // module < 2^5 in _SI32_LOCK_A_lock_module()
177 switch (module) in _SI32_LOCK_A_lock_module()
306 SI32_LOCK_A_Enum_Type module) in _SI32_LOCK_A_unlock_module() argument
308 assert(module < 32); // module < 2^5 in _SI32_LOCK_A_unlock_module()
313 switch (module) in _SI32_LOCK_A_unlock_module()
439 SI32_LOCK_A_Enum_Type module) in _SI32_LOCK_A_is_module_locked() argument
441 assert(module < 32); // module < 2^5 in _SI32_LOCK_A_is_module_locked()
445 switch (module) in _SI32_LOCK_A_is_module_locked()
/hal_silabs-latest/si32/si32Hal/sim3c1xx/
DSI32_LOCK_A_Type.h228 #define SI32_LOCK_A_lock_module(basePointer, module) \ argument
229 _SI32_LOCK_A_lock_module(basePointer, module)
252 #define SI32_LOCK_A_unlock_module(basePointer, module) \ argument
253 _SI32_LOCK_A_unlock_module(basePointer, module)
275 #define SI32_LOCK_A_is_module_locked(basePointer, module) \ argument
276 _SI32_LOCK_A_is_module_locked(basePointer, module)
DSI32_LOCK_A_Type.c170 SI32_LOCK_A_Enum_Type module) in _SI32_LOCK_A_lock_module() argument
172 assert(module < 32); // module < 2^5 in _SI32_LOCK_A_lock_module()
177 switch (module) in _SI32_LOCK_A_lock_module()
306 SI32_LOCK_A_Enum_Type module) in _SI32_LOCK_A_unlock_module() argument
308 assert(module < 32); // module < 2^5 in _SI32_LOCK_A_unlock_module()
313 switch (module) in _SI32_LOCK_A_unlock_module()
441 SI32_LOCK_A_Enum_Type module) in _SI32_LOCK_A_is_module_locked() argument
443 assert(module < 32); // module < 2^5 in _SI32_LOCK_A_is_module_locked()
447 switch (module) in _SI32_LOCK_A_is_module_locked()
/hal_silabs-latest/si32/si32Hal/sim3u1xx/
DSI32_LOCK_A_Type.h226 #define SI32_LOCK_A_lock_module(basePointer, module) \ argument
227 _SI32_LOCK_A_lock_module(basePointer, module)
250 #define SI32_LOCK_A_unlock_module(basePointer, module) \ argument
251 _SI32_LOCK_A_unlock_module(basePointer, module)
273 #define SI32_LOCK_A_is_module_locked(basePointer, module) \ argument
274 _SI32_LOCK_A_is_module_locked(basePointer, module)
DSI32_LOCK_A_Type.c170 SI32_LOCK_A_Enum_Type module) in _SI32_LOCK_A_lock_module() argument
172 assert(module < 32); // module < 2^5 in _SI32_LOCK_A_lock_module()
177 switch (module) in _SI32_LOCK_A_lock_module()
310 SI32_LOCK_A_Enum_Type module) in _SI32_LOCK_A_unlock_module() argument
312 assert(module < 32); // module < 2^5 in _SI32_LOCK_A_unlock_module()
317 switch (module) in _SI32_LOCK_A_unlock_module()
449 SI32_LOCK_A_Enum_Type module) in _SI32_LOCK_A_is_module_locked() argument
451 assert(module < 32); // module < 2^5 in _SI32_LOCK_A_is_module_locked()
455 switch (module) in _SI32_LOCK_A_is_module_locked()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/rom_driver/inc/
Drsi_rom_ulpss_clk.h602 ULPPERIPHERALS_CLK_T module, in RSI_ULPSS_PeripheralEnable() argument
606 return ROMAPI_ULPSS_CLK_API->ulpss_peripheral_enable(pULPCLK, module, clkType); in RSI_ULPSS_PeripheralEnable()
608 return ulpss_peripheral_enable(pULPCLK, module, clkType); in RSI_ULPSS_PeripheralEnable()
618 …C INLINE rsi_error_t RSI_ULPSS_PeripheralDisable(ULPCLK_Type *pULPCLK, ULPPERIPHERALS_CLK_T module) in RSI_ULPSS_PeripheralDisable() argument
621 return ROMAPI_ULPSS_CLK_API->ulpss_peripheral_disable(pULPCLK, module); in RSI_ULPSS_PeripheralDisable()
623 return ulpss_peripheral_disable(pULPCLK, module); in RSI_ULPSS_PeripheralDisable()
674 rsi_error_t RSI_ULPSS_PeripheralEnable(ULPCLK_Type *pULPCLK, ULPPERIPHERALS_CLK_T module, CLK_ENABL…
676 rsi_error_t RSI_ULPSS_PeripheralDisable(ULPCLK_Type *pULPCLK, ULPPERIPHERALS_CLK_T module);
Drsi_rom_clks.h1646 STATIC INLINE rsi_error_t RSI_CLK_PeripheralClkEnable(M4CLK_Type *pCLK, PERIPHERALS_CLK_T module, C… in RSI_CLK_PeripheralClkEnable() argument
1649 return ROMAPI_M4SS_CLK_API->clk_peripheral_clk_enable(pCLK, module, clkType); in RSI_CLK_PeripheralClkEnable()
1651 return clk_peripheral_clk_enable(pCLK, module, clkType); in RSI_CLK_PeripheralClkEnable()
1662 STATIC INLINE rsi_error_t RSI_CLK_PeripheralClkDisable(M4CLK_Type *pCLK, PERIPHERALS_CLK_T module) in RSI_CLK_PeripheralClkDisable() argument
1665 return ROMAPI_M4SS_CLK_API->clk_peripheral_clk_disable(pCLK, module); in RSI_CLK_PeripheralClkDisable()
1667 return clk_peripheral_clk_disable(pCLK, module); in RSI_CLK_PeripheralClkDisable()
Drsi_rom_table_si91x.h815 …rsi_error_t (*ulpss_peripheral_enable)(ULPCLK_Type *pULPCLK, ULPPERIPHERALS_CLK_T module, CLK_ENAB…
817 rsi_error_t (*ulpss_peripheral_disable)(ULPCLK_Type *pULPCLK, ULPPERIPHERALS_CLK_T module);
943 …rsi_error_t (*clk_peripheral_clk_enable)(M4CLK_Type *pCLK, PERIPHERALS_CLK_T module, CLK_ENABLE_T …
944 rsi_error_t (*clk_peripheral_clk_disable)(M4CLK_Type *pCLK, PERIPHERALS_CLK_T module);
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_ulpss_clk.h353 rsi_error_t ulpss_peripheral_enable(ULPCLK_Type *pULPCLK, ULPPERIPHERALS_CLK_T module, CLK_ENABLE_T…
355 rsi_error_t ulpss_peripheral_disable(ULPCLK_Type *pULPCLK, ULPPERIPHERALS_CLK_T module);
Drsi_pll.h825 rsi_error_t clk_peripheral_clk_enable(M4CLK_Type *pCLK, PERIPHERALS_CLK_T module, CLK_ENABLE_T clkT…
827 rsi_error_t clk_peripheral_clk_disable(M4CLK_Type *pCLK, PERIPHERALS_CLK_T module);
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ulpss_clk.c812 rsi_error_t ulpss_peripheral_enable(ULPCLK_Type *pULPCLK, ULPPERIPHERALS_CLK_T module, CLK_ENABLE_T… in ulpss_peripheral_enable() argument
817 switch (module) { in ulpss_peripheral_enable()
915 rsi_error_t ulpss_peripheral_disable(ULPCLK_Type *pULPCLK, ULPPERIPHERALS_CLK_T module) in ulpss_peripheral_disable() argument
920 switch (module) { in ulpss_peripheral_disable()
Drsi_pll.c2497 rsi_error_t clk_peripheral_clk_enable(M4CLK_Type *pCLK, PERIPHERALS_CLK_T module, CLK_ENABLE_T clkT… in clk_peripheral_clk_enable() argument
2503 switch (module) { in clk_peripheral_clk_enable()
2634 rsi_error_t clk_peripheral_clk_disable(M4CLK_Type *pCLK, PERIPHERALS_CLK_T module) in clk_peripheral_clk_disable() argument
2640 switch (module) { in clk_peripheral_clk_disable()
/hal_silabs-latest/simplicity_sdk/platform/service/clock_manager/src/
Dsli_clock_manager_hal.h74 sl_status_t sli_clock_manager_hal_enable_bus_clock(sl_bus_clock_t module,
/hal_silabs-latest/gecko/emlib/
DReadMe_emlib.txt32 The CMSIS Device library contains all peripheral module registers and bit field