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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ipmu.c54 uint32_t mask = 0; in RSI_IPMU_UpdateIpmuCalibData_efuse() local
60 mask = MASK_BITS(22, 0); in RSI_IPMU_UpdateIpmuCalibData_efuse()
62 value &= ~mask; in RSI_IPMU_UpdateIpmuCalibData_efuse()
70 mask = MASK_BITS(22, 0); in RSI_IPMU_UpdateIpmuCalibData_efuse()
72 value &= ~mask; in RSI_IPMU_UpdateIpmuCalibData_efuse()
80 mask = MASK_BITS(22, 0); in RSI_IPMU_UpdateIpmuCalibData_efuse()
82 value &= ~mask; in RSI_IPMU_UpdateIpmuCalibData_efuse()
90 mask = MASK_BITS(22, 0); in RSI_IPMU_UpdateIpmuCalibData_efuse()
92 value &= ~mask; in RSI_IPMU_UpdateIpmuCalibData_efuse()
98 mask = MASK_BITS(22, 0); in RSI_IPMU_UpdateIpmuCalibData_efuse()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/common/inc/
Dsl_bit.h71 #define SL_SET_BIT(val, mask) ((val) = ((val) | (mask))) argument
89 #define SL_CLEAR_BIT(val, mask) ((val) = ((val) & (~(mask)))) argument
109 #define SL_IS_BIT_SET(val, mask) (((((val) & (mask)) == (mask)) && ((mask) != 0u)) ? (true) : (fal… argument
128 #define SL_IS_BIT_CLEAR(val, mask) (((((val) & (mask)) == 0u) && ((mask) != 0u)) ? (true) : (false… argument
148 #define SL_IS_ANY_BIT_SET(val, mask) ((((val) & (mask)) == 0u) ? (false) : (true)) argument
168 #define SL_IS_ANY_BIT_CLEAR(val, mask) ((((val) & (mask)) == (mask)) ? (false) : (true)) argument
/hal_silabs-latest/gecko/emlib/src/
Dem_lcd.c684 void LCD_SegmentSetLow(int com, uint32_t mask, uint32_t bits) in LCD_SegmentSetLow() argument
694 EFM_ASSERT(!(mask & (~_LCD_SEGD0_MASK))); in LCD_SegmentSetLow()
700 segData &= ~(mask); in LCD_SegmentSetLow()
701 segData |= (mask & bits); in LCD_SegmentSetLow()
707 segData &= ~(mask); in LCD_SegmentSetLow()
708 segData |= (mask & bits); in LCD_SegmentSetLow()
714 segData &= ~(mask); in LCD_SegmentSetLow()
715 segData |= (mask & bits); in LCD_SegmentSetLow()
721 segData &= ~(mask); in LCD_SegmentSetLow()
722 segData |= (mask & bits); in LCD_SegmentSetLow()
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Dem_core.c654 void CORE_NvicMaskSetIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask) argument
657 mask->a[(unsigned)irqN >> 5] |= 1UL << ((unsigned)irqN & 0x1FUL);
670 void CORE_NvicMaskClearIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask) argument
673 mask->a[(unsigned)irqN >> 5] &= ~(1UL << ((unsigned)irqN & 0x1FUL));
767 void CORE_GetNvicEnabledMask(CORE_nvicMask_t *mask) argument
770 *mask = *(CORE_nvicMask_t*)((uint32_t)&NVIC->ISER[0]);
784 bool CORE_GetNvicMaskDisableState(const CORE_nvicMask_t *mask) argument
793 return (mask->a[0] & nvicMask.a[0]) == 0U;
796 return ((mask->a[0] & nvicMask.a[0]) == 0U)
797 && ((mask->a[1] & nvicMask.a[1]) == 0U);
[all …]
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_lcd.c684 void LCD_SegmentSetLow(int com, uint32_t mask, uint32_t bits) in LCD_SegmentSetLow() argument
694 EFM_ASSERT(!(mask & (~_LCD_SEGD0_MASK))); in LCD_SegmentSetLow()
700 segData &= ~(mask); in LCD_SegmentSetLow()
701 segData |= (mask & bits); in LCD_SegmentSetLow()
707 segData &= ~(mask); in LCD_SegmentSetLow()
708 segData |= (mask & bits); in LCD_SegmentSetLow()
714 segData &= ~(mask); in LCD_SegmentSetLow()
715 segData |= (mask & bits); in LCD_SegmentSetLow()
721 segData &= ~(mask); in LCD_SegmentSetLow()
722 segData |= (mask & bits); in LCD_SegmentSetLow()
[all …]
Dem_core.c222 void CORE_NvicMaskSetIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask) argument
225 mask->a[(unsigned)irqN >> 5] |= 1UL << ((unsigned)irqN & 0x1FUL);
243 void CORE_NvicMaskClearIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask) argument
246 mask->a[(unsigned)irqN >> 5] &= ~(1UL << ((unsigned)irqN & 0x1FUL));
258 void CORE_GetNvicEnabledMask(CORE_nvicMask_t *mask) argument
261 *mask = *(CORE_nvicMask_t*)((uint32_t)&NVIC->ISER[0]);
277 bool CORE_GetNvicMaskDisableState(const CORE_nvicMask_t *mask) argument
286 return (mask->a[0] & nvicMask.a[0]) == 0U;
289 return ((mask->a[0] & nvicMask.a[0]) == 0U)
290 && ((mask->a[1] & nvicMask.a[1]) == 0U);
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_power_save.h771 STATIC INLINE void RSI_PS_M4ssPeriPowerDown(uint32_t mask) in RSI_PS_M4ssPeriPowerDown() argument
773 BATT_FF->M4SS_PWRCTRL_CLEAR_REG = mask; in RSI_PS_M4ssPeriPowerDown()
784 STATIC INLINE void RSI_PS_M4ssPeriPowerUp(uint32_t mask) in RSI_PS_M4ssPeriPowerUp() argument
786 BATT_FF->M4SS_PWRCTRL_SET_REG = mask; in RSI_PS_M4ssPeriPowerUp()
815 STATIC INLINE void RSI_PS_M4ss_Tass_Ctrl_Clear(uint32_t mask) in RSI_PS_M4ss_Tass_Ctrl_Clear() argument
817 BATT_FF->M4SS_TASS_CTRL_CLEAR_REG = mask; in RSI_PS_M4ss_Tass_Ctrl_Clear()
828 STATIC INLINE void RSI_PS_UlpssPeriPowerDown(uint32_t mask) in RSI_PS_UlpssPeriPowerDown() argument
830 BATT_FF->ULPSS_PWRCTRL_CLEAR_REG = mask; in RSI_PS_UlpssPeriPowerDown()
841 STATIC INLINE void RSI_PS_UlpssPeriPowerUp(uint32_t mask) in RSI_PS_UlpssPeriPowerUp() argument
843 BATT_FF->ULPSS_PWRCTRL_SET_REG = mask; in RSI_PS_UlpssPeriPowerUp()
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/hal_silabs-latest/gecko/emlib/inc/
Dem_bus.h222 uint32_t mask) in BUS_RegMaskedSet() argument
226 *(volatile uint32_t *)aliasAddr = mask; in BUS_RegMaskedSet()
229 *(volatile uint32_t *)aliasAddr = mask; in BUS_RegMaskedSet()
234 *addr |= mask; in BUS_RegMaskedSet()
260 uint32_t mask) in BUS_RegMaskedClear() argument
264 *(volatile uint32_t *)aliasAddr = mask; in BUS_RegMaskedClear()
267 *(volatile uint32_t *)aliasAddr = mask; in BUS_RegMaskedClear()
272 *addr &= ~mask; in BUS_RegMaskedClear()
302 uint32_t mask, in BUS_RegMaskedWrite() argument
308 *addr = (*addr & ~mask) | (val & mask); in BUS_RegMaskedWrite()
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Dem_core.h143 #define CORE_NVIC_DISABLE(mask) CORE_NvicDisableMask(mask) argument
148 #define CORE_NVIC_ENABLE(mask) CORE_NvicEnableMask(mask) argument
155 #define CORE_NVIC_SECTION(mask, yourcode) \ argument
158 CORE_ENTER_NVIC(mask); \
195 void CORE_GetNvicEnabledMask(CORE_nvicMask_t *mask);
196 bool CORE_GetNvicMaskDisableState(const CORE_nvicMask_t *mask);
203 void CORE_NvicMaskSetIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask);
204 void CORE_NvicMaskClearIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask);
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_bus.h222 uint32_t mask) in BUS_RegMaskedSet() argument
226 *(volatile uint32_t *)aliasAddr = mask; in BUS_RegMaskedSet()
229 *(volatile uint32_t *)aliasAddr = mask; in BUS_RegMaskedSet()
234 *addr |= mask; in BUS_RegMaskedSet()
260 uint32_t mask) in BUS_RegMaskedClear() argument
264 *(volatile uint32_t *)aliasAddr = mask; in BUS_RegMaskedClear()
267 *(volatile uint32_t *)aliasAddr = mask; in BUS_RegMaskedClear()
272 *addr &= ~mask; in BUS_RegMaskedClear()
306 uint32_t mask, in BUS_RegMaskedWrite() argument
313 *addr = (*addr & ~mask) | (val & mask); in BUS_RegMaskedWrite()
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Dem_core.h95 #define CORE_NVIC_DISABLE(mask) CORE_NvicDisableMask(mask) argument
100 #define CORE_NVIC_ENABLE(mask) CORE_NvicEnableMask(mask) argument
107 #define CORE_NVIC_SECTION(mask, yourcode) \ argument
110 CORE_ENTER_NVIC(mask); \
147 void CORE_GetNvicEnabledMask(CORE_nvicMask_t *mask) SL_DEPRECATED_API_SDK_2024_6;
148 bool CORE_GetNvicMaskDisableState(const CORE_nvicMask_t *mask) SL_DEPRECATED_API_SDK_2024_6;
155 void CORE_NvicMaskSetIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask) SL_DEPRECATED_API_SDK_2024_6;
156 void CORE_NvicMaskClearIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask) SL_DEPRECATED_API_SDK_2024_6;
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/src/iPMU_prog/iPMU_dotc/
Dipmu_apis.c184 void update_ipmu_data(uint32_t reg_addr, uint32_t reg_type, uint32_t data, uint32_t mask) in update_ipmu_data() argument
195 value &= ~mask; in update_ipmu_data()
216 uint32_t mask; in update_ipmu_calib_data() local
225 mask = MASK_BITS(1, 18); in update_ipmu_calib_data()
228 mask = MASK_BITS(1, 18) | MASK_BITS(2, 10); in update_ipmu_calib_data()
230 update_ipmu_data(iPMU_SPARE_REG1_OFFSET, ULP_SPI, data, mask); in update_ipmu_calib_data()
234 mask = MASK_BITS(3, 19); in update_ipmu_calib_data()
240 mask |= MASK_BITS(3, 10) | MASK_BITS(3, 7); in update_ipmu_calib_data()
241 update_ipmu_data(BG_SCDC_PROG_REG_1_OFFSET, ULP_SPI, data, mask); in update_ipmu_calib_data()
277 mask = MASK_BITS(5, 0); in update_ipmu_calib_data()
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/hal_silabs-latest/simplicity_sdk/platform/peripheral/inc/
Dsl_hal_bus.h163 uint32_t mask) in sl_hal_bus_reg_set_mask() argument
167 *(volatile uint32_t *)aliasAddr = mask; in sl_hal_bus_reg_set_mask()
172 *addr |= mask; in sl_hal_bus_reg_set_mask()
197 uint32_t mask) in sl_hal_bus_reg_clear_mask() argument
201 *(volatile uint32_t *)aliasAddr = mask; in sl_hal_bus_reg_clear_mask()
206 *addr &= ~mask; in sl_hal_bus_reg_clear_mask()
236 uint32_t mask, in sl_hal_bus_reg_write_mask() argument
241 *addr = (*addr & ~mask) | (val & mask); in sl_hal_bus_reg_write_mask()
263 uint32_t mask) in sl_hal_bus_reg_read_mask() argument
265 return *addr & mask; in sl_hal_bus_reg_read_mask()
/hal_silabs-latest/si32/si32Hal/sim3c1xx/
DSI32_PBCFG_A_Type.c658 uint32_t mask) in _SI32_PBCFG_A_enable_xbar0l_peripherals() argument
661 basePointer->XBAR0L_SET = mask; in _SI32_PBCFG_A_enable_xbar0l_peripherals()
674 uint32_t mask) in _SI32_PBCFG_A_disable_xbar0l_peripherals() argument
677 basePointer->XBAR0L_CLR = mask; in _SI32_PBCFG_A_disable_xbar0l_peripherals()
792 uint32_t mask) in _SI32_PBCFG_A_enable_xbar0h_peripherals() argument
795 basePointer->XBAR0H_SET = mask; in _SI32_PBCFG_A_enable_xbar0h_peripherals()
808 uint32_t mask) in _SI32_PBCFG_A_disable_xbar0h_peripherals() argument
811 basePointer->XBAR0H_CLR = mask; in _SI32_PBCFG_A_disable_xbar0h_peripherals()
879 uint32_t mask) in _SI32_PBCFG_A_enable_xbar1_peripherals() argument
882 basePointer->XBAR1_SET = mask; in _SI32_PBCFG_A_enable_xbar1_peripherals()
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DSI32_PBCFG_A_Type.h779 #define SI32_PBCFG_A_enable_xbar0l_peripherals(basePointer, mask) \ argument
780 (basePointer->XBAR0L_SET = mask)
802 #define SI32_PBCFG_A_disable_xbar0l_peripherals(basePointer, mask) \ argument
803 (basePointer->XBAR0L_CLR = mask)
909 #define SI32_PBCFG_A_enable_xbar0h_peripherals(basePointer, mask) \ argument
910 (basePointer->XBAR0H_SET = mask)
932 #define SI32_PBCFG_A_disable_xbar0h_peripherals(basePointer, mask) \ argument
933 (basePointer->XBAR0H_CLR = mask)
1019 #define SI32_PBCFG_A_enable_xbar1_peripherals(basePointer, mask) \ argument
1020 (basePointer->XBAR1_SET = mask)
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DSI32_CLKCTRL_A_Type.c503 uint32_t mask) in _SI32_CLKCTRL_A_enable_apb_to_modules_0() argument
506 basePointer->APBCLKG0_SET = mask; in _SI32_CLKCTRL_A_enable_apb_to_modules_0()
519 uint32_t mask) in _SI32_CLKCTRL_A_disable_apb_to_modules_0() argument
522 basePointer->APBCLKG0_CLR = mask; in _SI32_CLKCTRL_A_disable_apb_to_modules_0()
535 uint32_t mask) in _SI32_CLKCTRL_A_enable_apb_to_modules_1() argument
538 basePointer->APBCLKG1_SET = mask; in _SI32_CLKCTRL_A_enable_apb_to_modules_1()
551 uint32_t mask) in _SI32_CLKCTRL_A_disable_apb_to_modules_1() argument
554 basePointer->APBCLKG1_CLR = mask; in _SI32_CLKCTRL_A_disable_apb_to_modules_1()
DSI32_CLKCTRL_A_Type.h622 #define SI32_CLKCTRL_A_enable_apb_to_modules_0(basePointer, mask) \ argument
623 (basePointer->APBCLKG0_SET = mask)
645 #define SI32_CLKCTRL_A_disable_apb_to_modules_0(basePointer, mask) \ argument
646 (basePointer->APBCLKG0_CLR = mask)
668 #define SI32_CLKCTRL_A_enable_apb_to_modules_1(basePointer, mask) \ argument
669 (basePointer->APBCLKG1_SET = mask)
691 #define SI32_CLKCTRL_A_disable_apb_to_modules_1(basePointer, mask) \ argument
692 (basePointer->APBCLKG1_CLR = mask)
DSI32_DMAXBAR_A_Type.c125 uint32_t mask = 0xF << shift; in _SI32_DMAXBAR_A_select_channel_peripheral() local
131 basePointer->DMAXBAR1_CLR = mask; in _SI32_DMAXBAR_A_select_channel_peripheral()
135 basePointer->DMAXBAR0_CLR = mask; in _SI32_DMAXBAR_A_select_channel_peripheral()
/hal_silabs-latest/si32/si32Hal/sim3u1xx/
DSI32_PBCFG_A_Type.c658 uint32_t mask) in _SI32_PBCFG_A_enable_xbar0l_peripherals() argument
661 basePointer->XBAR0L_SET = mask; in _SI32_PBCFG_A_enable_xbar0l_peripherals()
674 uint32_t mask) in _SI32_PBCFG_A_disable_xbar0l_peripherals() argument
677 basePointer->XBAR0L_CLR = mask; in _SI32_PBCFG_A_disable_xbar0l_peripherals()
792 uint32_t mask) in _SI32_PBCFG_A_enable_xbar0h_peripherals() argument
795 basePointer->XBAR0H_SET = mask; in _SI32_PBCFG_A_enable_xbar0h_peripherals()
808 uint32_t mask) in _SI32_PBCFG_A_disable_xbar0h_peripherals() argument
811 basePointer->XBAR0H_CLR = mask; in _SI32_PBCFG_A_disable_xbar0h_peripherals()
879 uint32_t mask) in _SI32_PBCFG_A_enable_xbar1_peripherals() argument
882 basePointer->XBAR1_SET = mask; in _SI32_PBCFG_A_enable_xbar1_peripherals()
[all …]
DSI32_PBCFG_A_Type.h777 #define SI32_PBCFG_A_enable_xbar0l_peripherals(basePointer, mask) \ argument
778 (basePointer->XBAR0L_SET = mask)
800 #define SI32_PBCFG_A_disable_xbar0l_peripherals(basePointer, mask) \ argument
801 (basePointer->XBAR0L_CLR = mask)
907 #define SI32_PBCFG_A_enable_xbar0h_peripherals(basePointer, mask) \ argument
908 (basePointer->XBAR0H_SET = mask)
930 #define SI32_PBCFG_A_disable_xbar0h_peripherals(basePointer, mask) \ argument
931 (basePointer->XBAR0H_CLR = mask)
1017 #define SI32_PBCFG_A_enable_xbar1_peripherals(basePointer, mask) \ argument
1018 (basePointer->XBAR1_SET = mask)
[all …]
DSI32_CLKCTRL_A_Type.c547 uint32_t mask) in _SI32_CLKCTRL_A_enable_apb_to_modules_0() argument
550 basePointer->APBCLKG0_SET = mask; in _SI32_CLKCTRL_A_enable_apb_to_modules_0()
563 uint32_t mask) in _SI32_CLKCTRL_A_disable_apb_to_modules_0() argument
566 basePointer->APBCLKG0_CLR = mask; in _SI32_CLKCTRL_A_disable_apb_to_modules_0()
579 uint32_t mask) in _SI32_CLKCTRL_A_enable_apb_to_modules_1() argument
582 basePointer->APBCLKG1_SET = mask; in _SI32_CLKCTRL_A_enable_apb_to_modules_1()
595 uint32_t mask) in _SI32_CLKCTRL_A_disable_apb_to_modules_1() argument
598 basePointer->APBCLKG1_CLR = mask; in _SI32_CLKCTRL_A_disable_apb_to_modules_1()
DSI32_CLKCTRL_A_Type.h667 #define SI32_CLKCTRL_A_enable_apb_to_modules_0(basePointer, mask) \ argument
668 (basePointer->APBCLKG0_SET = mask)
690 #define SI32_CLKCTRL_A_disable_apb_to_modules_0(basePointer, mask) \ argument
691 (basePointer->APBCLKG0_CLR = mask)
713 #define SI32_CLKCTRL_A_enable_apb_to_modules_1(basePointer, mask) \ argument
714 (basePointer->APBCLKG1_SET = mask)
736 #define SI32_CLKCTRL_A_disable_apb_to_modules_1(basePointer, mask) \ argument
737 (basePointer->APBCLKG1_CLR = mask)
/hal_silabs-latest/si32/si32Hal/sim3l1xx/
DSI32_CLKCTRL_A_Type.c616 uint32_t mask) in _SI32_CLKCTRL_A_enable_apb_to_modules_0() argument
619 basePointer->APBCLKG0_SET = mask; in _SI32_CLKCTRL_A_enable_apb_to_modules_0()
632 uint32_t mask) in _SI32_CLKCTRL_A_disable_apb_to_modules_0() argument
635 basePointer->APBCLKG0_CLR = mask; in _SI32_CLKCTRL_A_disable_apb_to_modules_0()
648 uint32_t mask) in _SI32_CLKCTRL_A_enable_apb_to_modules_1() argument
651 basePointer->APBCLKG1_SET = mask; in _SI32_CLKCTRL_A_enable_apb_to_modules_1()
664 uint32_t mask) in _SI32_CLKCTRL_A_disable_apb_to_modules_1() argument
667 basePointer->APBCLKG1_CLR = mask; in _SI32_CLKCTRL_A_disable_apb_to_modules_1()
DSI32_CLKCTRL_A_Type.h746 #define SI32_CLKCTRL_A_enable_apb_to_modules_0(basePointer, mask) \ argument
747 (basePointer->APBCLKG0_SET = mask)
769 #define SI32_CLKCTRL_A_disable_apb_to_modules_0(basePointer, mask) \ argument
770 (basePointer->APBCLKG0_CLR = mask)
792 #define SI32_CLKCTRL_A_enable_apb_to_modules_1(basePointer, mask) \ argument
793 (basePointer->APBCLKG1_SET = mask)
815 #define SI32_CLKCTRL_A_disable_apb_to_modules_1(basePointer, mask) \ argument
816 (basePointer->APBCLKG1_CLR = mask)
DSI32_DMAXBAR_A_Type.c125 uint32_t mask = 0xF << shift; in _SI32_DMAXBAR_A_select_channel_peripheral() local
131 basePointer->DMAXBAR1_CLR = mask; in _SI32_DMAXBAR_A_select_channel_peripheral()
135 basePointer->DMAXBAR0_CLR = mask; in _SI32_DMAXBAR_A_select_channel_peripheral()

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