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Searched refs:mFactor (Results 1 – 4 of 4) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/rom_driver/inc/
Drsi_rom_clks.h201 uint16_t mFactor, in RSI_CLK_SocPllSetFreqDiv() argument
208 ->clk_soc_pll_set_freq_div(pCLK, clk_en, divFactor, nFactor, mFactor, fCwf, dcofixsel, ldoprog); in RSI_CLK_SocPllSetFreqDiv()
210 …return clk_soc_pll_set_freq_div(pCLK, clk_en, divFactor, nFactor, mFactor, fCwf, dcofixsel, ldopro… in RSI_CLK_SocPllSetFreqDiv()
410 uint16_t mFactor, in RSI_CLK_I2sPllSetFreqDiv() argument
414 …M4SS_CLK_API->clk_i2s_pll_set_freq_div(pCLK, u16DivFactor1, u16DivFactor2, nFactor, mFactor, fcwF); in RSI_CLK_I2sPllSetFreqDiv()
416 return clk_i2s_pll_set_freq_div(pCLK, u16DivFactor1, u16DivFactor2, nFactor, mFactor, fcwF); in RSI_CLK_I2sPllSetFreqDiv()
580 uint16_t mFactor, in RSI_CLK_IntfPllSetFreqDiv() argument
587 … ->clk_intf_pll_set_freq_div(pCLK, clk_en, divFactor, nFactor, mFactor, fcwF, dcoFixSel, ldoProg); in RSI_CLK_IntfPllSetFreqDiv()
589 …return clk_intf_pll_set_freq_div(pCLK, clk_en, divFactor, nFactor, mFactor, fcwF, dcoFixSel, ldoPr… in RSI_CLK_IntfPllSetFreqDiv()
Drsi_rom_table_si91x.h831 uint16_t mFactor,
851 uint16_t mFactor,
863 uint16_t mFactor,
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_pll.h670 uint16_t mFactor,
701 uint16_t mFactor,
718 uint16_t mFactor,
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_pll.c298 uint16_t mFactor, in clk_soc_pll_set_freq_div() argument
327 socreg1 |= (uint16_t)(mFactor << 6 | PLL_500_CLK_ENABLE); in clk_soc_pll_set_freq_div()
367 socreg1 |= (uint16_t)((mFactor << 6) | PLL_500_CLK_ENABLE); in clk_soc_pll_set_freq_div()
691 uint16_t mFactor, in clk_i2s_pll_set_freq_div() argument
707 i2sreg1 |= (uint16_t)(mFactor << 6); in clk_i2s_pll_set_freq_div()
1024 uint16_t mFactor, in clk_intf_pll_set_freq_div() argument
1054 intfreg1 |= (uint16_t)((mFactor << 6) | PLL_500_CLK_ENABLE); /* m factor */ in clk_intf_pll_set_freq_div()
1093 intfreg1 |= (uint16_t)((mFactor << 6) | PLL_500_CLK_ENABLE); /* m factor */ in clk_intf_pll_set_freq_div()