Home
last modified time | relevance | path

Searched refs:m4_ref_clock_source (Results 1 – 4 of 4) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/
Dclock_update.c106 switch (system_clocks.m4_ref_clock_source) { in RSI_CLK_GetBaseClock()
165 switch (system_clocks.m4_ref_clock_source) { in RSI_CLK_GetBaseClock()
224 switch (system_clocks.m4_ref_clock_source) { in RSI_CLK_GetBaseClock()
277 switch (system_clocks.m4_ref_clock_source) { in RSI_CLK_GetBaseClock()
490 switch (system_clocks.m4_ref_clock_source) { in RSI_CLK_GetBaseClock()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ipmu.c939 if (system_clocks.m4_ref_clock_source == ULP_MHZ_RC_CLK) { in RSI_IPMU_M32rc_OscTrimEfuse()
964 if (system_clocks.m4_ref_clock_source == ULP_MHZ_RC_CLK) { in RSI_IPMU_M20rcOsc_TrimEfuse()
998 if (system_clocks.m4_ref_clock_source == ULP_20MHZ_RINGOSC_CLK) { in RSI_IPMU_M20roOsc_TrimEfuse()
1484 if (system_clocks.m4_ref_clock_source == ULP_MHZ_RC_CLK) { in RSI_Clks_Trim32MHzRC()
1548 if (system_clocks.m4_ref_clock_source == ULP_20MHZ_RINGOSC_CLK) { in RSI_IPMU_20M_ROClktrim()
Drsi_pll.c2825 system_clocks.m4_ref_clock_source = clkSource; in clk_m4ss_ref_clk_config()
2831 system_clocks.m4_ref_clock_source = clkSource; in clk_m4ss_ref_clk_config()
2837 system_clocks.m4_ref_clock_source = clkSource; in clk_m4ss_ref_clk_config()
2844 system_clocks.m4_ref_clock_source = clkSource; in clk_m4ss_ref_clk_config()
2852 system_clocks.m4_ref_clock_source = clkSource; in clk_m4ss_ref_clk_config()
2861 system_clocks.m4_ref_clock_source = clkSource; in clk_m4ss_ref_clk_config()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/inc/
Dsystem_si91x.h171 uint32_t m4_ref_clock_source; member