Home
last modified time | relevance | path

Searched refs:init (Results 1 – 25 of 103) sorted by relevance

12345

/hal_silabs-latest/gecko/emlib/src/
Dem_opamp.c370 const OPAMP_Init_TypeDef *init) in OPAMP_Enable() argument
377 EFM_ASSERT(init->bias <= (_DAC_BIASPROG_BIASPROG_MASK in OPAMP_Enable()
381 EFM_ASSERT((init->outPen & ~_DAC_OPA0MUX_OUTPEN_MASK) == 0); in OPAMP_Enable()
386 | (init->bias << _DAC_BIASPROG_BIASPROG_SHIFT) in OPAMP_Enable()
387 | (init->halfBias ? DAC_BIASPROG_HALFBIAS : 0); in OPAMP_Enable()
389 if (init->defaultOffset) { in OPAMP_Enable()
394 EFM_ASSERT(init->offset <= (_DAC_CAL_CH0OFFSET_MASK in OPAMP_Enable()
398 | (init->offset << _DAC_CAL_CH0OFFSET_SHIFT); in OPAMP_Enable()
401 dac->OPA0MUX = (uint32_t)init->resSel in OPAMP_Enable()
402 | (uint32_t)init->outMode in OPAMP_Enable()
[all …]
Dem_timer.c178 void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init) in TIMER_Init() argument
190 timer->CFG = ((uint32_t)init->prescale << _TIMER_CFG_PRESC_SHIFT) in TIMER_Init()
191 | ((uint32_t)init->clkSel << _TIMER_CFG_CLKSEL_SHIFT) in TIMER_Init()
192 | ((uint32_t)init->mode << _TIMER_CFG_MODE_SHIFT) in TIMER_Init()
193 | (init->debugRun ? TIMER_CFG_DEBUGRUN : 0) in TIMER_Init()
194 | (init->dmaClrAct ? TIMER_CFG_DMACLRACT : 0) in TIMER_Init()
195 | (init->quadModeX4 ? TIMER_CFG_QDM_X4 : 0) in TIMER_Init()
196 | (init->oneShot ? TIMER_CFG_OSMEN : 0) in TIMER_Init()
197 | (init->sync ? TIMER_CFG_SYNC : 0) in TIMER_Init()
198 | (init->disSyncOut ? TIMER_CFG_DISSYNCOUT : 0) in TIMER_Init()
[all …]
Dem_csen.c107 void CSEN_Init(CSEN_TypeDef *csen, const CSEN_Init_TypeDef *init) in CSEN_Init() argument
112 EFM_ASSERT(init->warmUpCount < 4); in CSEN_Init()
117 if (init->cpAccuracyHi) { in CSEN_Init()
121 if (init->localSense) { in CSEN_Init()
125 if (init->keepWarm) { in CSEN_Init()
132 csen->TIMCTRL = (init->warmUpCount << _CSEN_TIMCTRL_WARMUPCNT_SHIFT) in CSEN_Init()
133 | (init->pcReload << _CSEN_TIMCTRL_PCTOP_SHIFT) in CSEN_Init()
134 | (init->pcPrescale << _CSEN_TIMCTRL_PCPRESC_SHIFT); in CSEN_Init()
137 csen->PRSSEL = init->prsSel << _CSEN_PRSSEL_PRSSEL_SHIFT; in CSEN_Init()
140 csen->SCANINPUTSEL0 = (init->input0To7 << _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_SHIFT) in CSEN_Init()
[all …]
Dem_eusart.c64 const EUSART_UartInit_TypeDef *init,
70 const EUSART_SpiInit_TypeDef *init);
109 void EUSART_UartInitHf(EUSART_TypeDef *eusart, const EUSART_UartInit_TypeDef *init) in EUSART_UartInitHf() argument
114 EFM_ASSERT(init); in EUSART_UartInitHf()
118 EFM_ASSERT(init->oversampling != eusartOVS0); in EUSART_UartInitHf()
121 EFM_ASSERT(init->databits <= eusartDataBits9); in EUSART_UartInitHf()
124 EUSART_AsyncInitCommon(eusart, init, NULL, NULL); in EUSART_UartInitHf()
135 void EUSART_UartInitLf(EUSART_TypeDef *eusart, const EUSART_UartInit_TypeDef *init) in EUSART_UartInitLf() argument
140 EFM_ASSERT(init); in EUSART_UartInitLf()
170 EFM_ASSERT(init->databits <= eusartDataBits9); in EUSART_UartInitLf()
[all …]
Dem_acmp.c166 void ACMP_CapsenseInit(ACMP_TypeDef *acmp, const ACMP_CapsenseInit_TypeDef *init) in ACMP_CapsenseInit() argument
171 EFM_ASSERT(init->vrefDiv < 64); in ACMP_CapsenseInit()
172 EFM_ASSERT(init->biasProg in ACMP_CapsenseInit()
176 acmp->CFG = (init->biasProg << _ACMP_CFG_BIAS_SHIFT) in ACMP_CapsenseInit()
177 | (init->hysteresisLevel << _ACMP_CFG_HYST_SHIFT); in ACMP_CapsenseInit()
180 acmp->INPUTCTRL = (init->resistor << _ACMP_INPUTCTRL_CSRESSEL_SHIFT) in ACMP_CapsenseInit()
181 | (init->vrefDiv << _ACMP_INPUTCTRL_VREFDIV_SHIFT) in ACMP_CapsenseInit()
183 if (!init->enable) { in ACMP_CapsenseInit()
188 EFM_ASSERT(init->vddLevelLow < 64); in ACMP_CapsenseInit()
189 EFM_ASSERT(init->vddLevelHigh < 64); in ACMP_CapsenseInit()
[all …]
Dem_vdac.c182 void VDAC_Init(VDAC_TypeDef *vdac, const VDAC_Init_TypeDef *init) in VDAC_Init() argument
201 if (init->mainCalibration) { in VDAC_Init()
208 switch (init->reference) { in VDAC_Init()
240 switch (init->reference) { in VDAC_Init()
259 config = ((uint32_t)init->asyncClockMode << _VDAC_CTRL_DACCLKMODE_SHIFT) in VDAC_Init()
260 | ((uint32_t)init->warmupKeepOn << _VDAC_CTRL_WARMUPMODE_SHIFT) in VDAC_Init()
261 | ((uint32_t)init->refresh << _VDAC_CTRL_REFRESHPERIOD_SHIFT) in VDAC_Init()
262 | (((uint32_t)init->prescaler << _VDAC_CTRL_PRESC_SHIFT) in VDAC_Init()
264 | ((uint32_t)init->reference << _VDAC_CTRL_REFSEL_SHIFT) in VDAC_Init()
265 | ((uint32_t)init->ch0ResetPre << _VDAC_CTRL_CH0PRESCRST_SHIFT) in VDAC_Init()
[all …]
Dem_pdm.c77 void PDM_Init(PDM_TypeDef *pdm, const PDM_Init_TypeDef *init) in PDM_Init() argument
79 EFM_ASSERT(init->dsr <= (_PDM_CTRL_DSR_MASK >> _PDM_CTRL_DSR_SHIFT)); in PDM_Init()
80 EFM_ASSERT(init->gain <= (_PDM_CTRL_GAIN_MASK >> _PDM_CTRL_GAIN_SHIFT)); in PDM_Init()
81 EFM_ASSERT(init->prescaler <= (_PDM_CFG1_PRESC_MASK >> _PDM_CFG1_PRESC_SHIFT)); in PDM_Init()
90 pdm->CFG0 = ((uint32_t)init->ch3ClkPolarity << _PDM_CFG0_CH3CLKPOL_SHIFT) in PDM_Init()
91 | ((uint32_t)init->ch2ClkPolarity << _PDM_CFG0_CH2CLKPOL_SHIFT) in PDM_Init()
92 | ((uint32_t)init->ch1ClkPolarity << _PDM_CFG0_CH1CLKPOL_SHIFT) in PDM_Init()
93 | ((uint32_t)init->ch0ClkPolarity << _PDM_CFG0_CH0CLKPOL_SHIFT) in PDM_Init()
94 | ((uint32_t)init->fifoValidWatermark << _PDM_CFG0_FIFODVL_SHIFT) in PDM_Init()
95 | ((uint32_t)init->dataFormat << _PDM_CFG0_DATAFORMAT_SHIFT) in PDM_Init()
[all …]
Dem_wdog.c203 void WDOGn_Init(WDOG_TypeDef *wdog, const WDOG_Init_TypeDef *init) in WDOGn_Init() argument
220 wdog->CFG = (init->debugRun ? WDOG_CFG_DEBUGRUN : 0U) in WDOGn_Init()
221 | (init->clrSrc ? WDOG_CFG_CLRSRC : 0U) in WDOGn_Init()
223 | (init->em1Run ? WDOG_CFG_EM1RUN : 0U) in WDOGn_Init()
225 | (init->em2Run ? WDOG_CFG_EM2RUN : 0U) in WDOGn_Init()
226 | (init->em3Run ? WDOG_CFG_EM3RUN : 0U) in WDOGn_Init()
227 | (init->em4Block ? WDOG_CFG_EM4BLOCK : 0U) in WDOGn_Init()
228 | (init->prs0MissRstEn ? WDOG_CFG_PRS0MISSRSTEN : 0U) in WDOGn_Init()
229 | (init->prs1MissRstEn ? WDOG_CFG_PRS1MISSRSTEN : 0U) in WDOGn_Init()
230 | (init->resetDisable ? WDOG_CFG_WDOGRSTDIS : 0U) in WDOGn_Init()
[all …]
Dem_adc.c373 void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init) in ADC_Init() argument
376 uint8_t presc = init->prescale; in ADC_Init()
403 tmp = ((uint32_t)(init->ovsRateSel) << _ADC_CTRL_OVSRSEL_SHIFT) in ADC_Init()
404 | (((uint32_t)(init->timebase) << _ADC_CTRL_TIMEBASE_SHIFT) in ADC_Init()
409 | ((uint32_t)(init->lpfMode) << _ADC_CTRL_LPFMODE_SHIFT) in ADC_Init()
411 | ((uint32_t)(init->warmUpMode) << _ADC_CTRL_WARMUPMODE_SHIFT); in ADC_Init()
413 if (init->tailgate) { in ADC_Init()
428 (uint32_t)init->em2ClockConfig); in ADC_Init()
719 void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init) in ADC_InitScan() argument
729 ADC_LoadDevinfoCal(adc, init->reference, true); in ADC_InitScan()
[all …]
Dem_pcnt.c512 void PCNT_Init(PCNT_TypeDef *pcnt, const PCNT_Init_TypeDef *init) in PCNT_Init() argument
523 EFM_ASSERT((1 << PCNT0_CNT_SIZE) > init->counter); in PCNT_Init()
524 EFM_ASSERT((1 << PCNT0_CNT_SIZE) > init->top); in PCNT_Init()
530 EFM_ASSERT((1 << PCNT1_CNT_SIZE) > init->counter); in PCNT_Init()
531 EFM_ASSERT((1 << PCNT1_CNT_SIZE) > init->top); in PCNT_Init()
537 EFM_ASSERT((1 << PCNT2_CNT_SIZE) > init->counter); in PCNT_Init()
538 EFM_ASSERT((1 << PCNT2_CNT_SIZE) > init->top); in PCNT_Init()
552 tmp |= ((uint32_t)init->s0PRS << _PCNT_INPUT_S0PRSSEL_SHIFT) in PCNT_Init()
553 | ((uint32_t)init->s1PRS << _PCNT_INPUT_S1PRSSEL_SHIFT); in PCNT_Init()
560 if (init->negEdge) { in PCNT_Init()
[all …]
Dem_usart.c762 void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init) in USART_InitAsync() argument
778 if (init->mvdis) { in USART_InitAsync()
785 if (init->prsRxEnable) { in USART_InitAsync()
786 prsRxInput(usart, init->prsRxCh); in USART_InitAsync()
791 usart->FRAME = (uint32_t)init->databits in USART_InitAsync()
792 | (uint32_t)init->stopbits in USART_InitAsync()
793 | (uint32_t)init->parity; in USART_InitAsync()
796 USART_BaudrateAsyncSet(usart, init->refFreq, init->baudrate, init->oversampling); in USART_InitAsync()
798 if (init->autoCsEnable) { in USART_InitAsync()
801 if (init->csInv) { in USART_InitAsync()
[all …]
Dem_gpcrc.c67 void GPCRC_Init(GPCRC_TypeDef * gpcrc, const GPCRC_Init_TypeDef * init) argument
72 if (init->crcPoly == 0x04C11DB7) {
76 EFM_ASSERT((init->crcPoly & 0xFFFF0000UL) == 0U);
82 revPoly = SL_RBIT16(init->crcPoly);
86 if (init->enable) {
92 gpcrc->CTRL = (((uint32_t)init->autoInit << _GPCRC_CTRL_AUTOINIT_SHIFT)
93 | ((uint32_t)init->reverseByteOrder << _GPCRC_CTRL_BYTEREVERSE_SHIFT)
94 | ((uint32_t)init->reverseBits << _GPCRC_CTRL_BITREVERSE_SHIFT)
95 | ((uint32_t)init->enableByteMode << _GPCRC_CTRL_BYTEMODE_SHIFT)
98 gpcrc->CTRL = (((uint32_t)init->autoInit << _GPCRC_CTRL_AUTOINIT_SHIFT)
[all …]
Dem_lesense.c117 void LESENSE_Init(const LESENSE_Init_TypeDef * init, bool reqReset) in LESENSE_Init() argument
120 EFM_ASSERT((uint32_t)init->timeCtrl.startDelay < 4U); in LESENSE_Init()
122 EFM_ASSERT((uint32_t)init->perCtrl.dacPresc < 32U); in LESENSE_Init()
146 LESENSE_StartDelaySet((uint32_t)init->timeCtrl.startDelay); in LESENSE_Init()
150 | (init->timeCtrl.delayAuxStartup << _LESENSE_TIMCTRL_AUXSTARTUP_SHIFT); in LESENSE_Init()
162 ((uint32_t)init->coreCtrl.prsSel << _LESENSE_CTRL_PRSSEL_SHIFT) in LESENSE_Init()
163 | (uint32_t)init->coreCtrl.scanConfSel in LESENSE_Init()
164 | (uint32_t)init->coreCtrl.bufTrigLevel in LESENSE_Init()
165 | (uint32_t)init->coreCtrl.wakeupOnDMA in LESENSE_Init()
167 | ((uint32_t)init->coreCtrl.invACMP0 << _LESENSE_CTRL_ACMP0INV_SHIFT) in LESENSE_Init()
[all …]
Dem_dac.c112 void DAC_Init(DAC_TypeDef *dac, const DAC_Init_TypeDef *init) in DAC_Init() argument
123 switch (init->reference) { in DAC_Init()
137 tmp = ((uint32_t)(init->refresh) << _DAC_CTRL_REFRSEL_SHIFT) in DAC_Init()
138 | (((uint32_t)(init->prescale) << _DAC_CTRL_PRESC_SHIFT) in DAC_Init()
140 | ((uint32_t)(init->reference) << _DAC_CTRL_REFSEL_SHIFT) in DAC_Init()
141 | ((uint32_t)(init->outMode) << _DAC_CTRL_OUTMODE_SHIFT) in DAC_Init()
142 | ((uint32_t)(init->convMode) << _DAC_CTRL_CONVMODE_SHIFT); in DAC_Init()
144 if (init->ch0ResetPre) { in DAC_Init()
148 if (init->outEnablePRS) { in DAC_Init()
152 if (init->sineEnable) { in DAC_Init()
[all …]
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_opamp.c370 const OPAMP_Init_TypeDef *init) in OPAMP_Enable() argument
377 EFM_ASSERT(init->bias <= (_DAC_BIASPROG_BIASPROG_MASK in OPAMP_Enable()
381 EFM_ASSERT((init->outPen & ~_DAC_OPA0MUX_OUTPEN_MASK) == 0); in OPAMP_Enable()
386 | (init->bias << _DAC_BIASPROG_BIASPROG_SHIFT) in OPAMP_Enable()
387 | (init->halfBias ? DAC_BIASPROG_HALFBIAS : 0); in OPAMP_Enable()
389 if (init->defaultOffset) { in OPAMP_Enable()
394 EFM_ASSERT(init->offset <= (_DAC_CAL_CH0OFFSET_MASK in OPAMP_Enable()
398 | (init->offset << _DAC_CAL_CH0OFFSET_SHIFT); in OPAMP_Enable()
401 dac->OPA0MUX = (uint32_t)init->resSel in OPAMP_Enable()
402 | (uint32_t)init->outMode in OPAMP_Enable()
[all …]
Dem_timer.c178 void TIMER_Init(TIMER_TypeDef *timer, const TIMER_Init_TypeDef *init) in TIMER_Init() argument
190 timer->CFG = ((uint32_t)init->prescale << _TIMER_CFG_PRESC_SHIFT) in TIMER_Init()
191 | ((uint32_t)init->clkSel << _TIMER_CFG_CLKSEL_SHIFT) in TIMER_Init()
192 | ((uint32_t)init->mode << _TIMER_CFG_MODE_SHIFT) in TIMER_Init()
193 | (init->debugRun ? TIMER_CFG_DEBUGRUN : 0) in TIMER_Init()
194 | (init->dmaClrAct ? TIMER_CFG_DMACLRACT : 0) in TIMER_Init()
195 | (init->quadModeX4 ? TIMER_CFG_QDM_X4 : 0) in TIMER_Init()
196 | (init->oneShot ? TIMER_CFG_OSMEN : 0) in TIMER_Init()
197 | (init->sync ? TIMER_CFG_SYNC : 0) in TIMER_Init()
198 | (init->disSyncOut ? TIMER_CFG_DISSYNCOUT : 0) in TIMER_Init()
[all …]
Dem_eusart.c64 const EUSART_UartInit_TypeDef *init,
70 const EUSART_SpiInit_TypeDef *init);
109 void EUSART_UartInitHf(EUSART_TypeDef *eusart, const EUSART_UartInit_TypeDef *init) in EUSART_UartInitHf() argument
114 EFM_ASSERT(init); in EUSART_UartInitHf()
118 EFM_ASSERT(init->oversampling != eusartOVS0); in EUSART_UartInitHf()
121 EFM_ASSERT(init->databits <= eusartDataBits9); in EUSART_UartInitHf()
124 EUSART_AsyncInitCommon(eusart, init, NULL, NULL); in EUSART_UartInitHf()
135 void EUSART_UartInitLf(EUSART_TypeDef *eusart, const EUSART_UartInit_TypeDef *init) in EUSART_UartInitLf() argument
140 EFM_ASSERT(init); in EUSART_UartInitLf()
173 EFM_ASSERT(init->databits <= eusartDataBits9); in EUSART_UartInitLf()
[all …]
Dem_acmp.c166 void ACMP_CapsenseInit(ACMP_TypeDef *acmp, const ACMP_CapsenseInit_TypeDef *init) in ACMP_CapsenseInit() argument
171 EFM_ASSERT(init->vrefDiv < 64); in ACMP_CapsenseInit()
172 EFM_ASSERT(init->biasProg in ACMP_CapsenseInit()
176 acmp->CFG = (init->biasProg << _ACMP_CFG_BIAS_SHIFT) in ACMP_CapsenseInit()
177 | (init->hysteresisLevel << _ACMP_CFG_HYST_SHIFT); in ACMP_CapsenseInit()
180 acmp->INPUTCTRL = (init->resistor << _ACMP_INPUTCTRL_CSRESSEL_SHIFT) in ACMP_CapsenseInit()
181 | (init->vrefDiv << _ACMP_INPUTCTRL_VREFDIV_SHIFT) in ACMP_CapsenseInit()
183 if (!init->enable) { in ACMP_CapsenseInit()
188 EFM_ASSERT(init->vddLevelLow < 64); in ACMP_CapsenseInit()
189 EFM_ASSERT(init->vddLevelHigh < 64); in ACMP_CapsenseInit()
[all …]
Dem_vdac.c182 void VDAC_Init(VDAC_TypeDef *vdac, const VDAC_Init_TypeDef *init) in VDAC_Init() argument
201 if (init->mainCalibration) { in VDAC_Init()
208 switch (init->reference) { in VDAC_Init()
240 switch (init->reference) { in VDAC_Init()
259 config = ((uint32_t)init->asyncClockMode << _VDAC_CTRL_DACCLKMODE_SHIFT) in VDAC_Init()
260 | ((uint32_t)init->warmupKeepOn << _VDAC_CTRL_WARMUPMODE_SHIFT) in VDAC_Init()
261 | ((uint32_t)init->refresh << _VDAC_CTRL_REFRESHPERIOD_SHIFT) in VDAC_Init()
262 | (((uint32_t)init->prescaler << _VDAC_CTRL_PRESC_SHIFT) in VDAC_Init()
264 | ((uint32_t)init->reference << _VDAC_CTRL_REFSEL_SHIFT) in VDAC_Init()
265 | ((uint32_t)init->ch0ResetPre << _VDAC_CTRL_CH0PRESCRST_SHIFT) in VDAC_Init()
[all …]
Dem_pdm.c77 void PDM_Init(PDM_TypeDef *pdm, const PDM_Init_TypeDef *init) in PDM_Init() argument
79 EFM_ASSERT(init->dsr <= (_PDM_CTRL_DSR_MASK >> _PDM_CTRL_DSR_SHIFT)); in PDM_Init()
80 EFM_ASSERT(init->gain <= (_PDM_CTRL_GAIN_MASK >> _PDM_CTRL_GAIN_SHIFT)); in PDM_Init()
81 EFM_ASSERT(init->prescaler <= (_PDM_CFG1_PRESC_MASK >> _PDM_CFG1_PRESC_SHIFT)); in PDM_Init()
90 pdm->CFG0 = ((uint32_t)init->ch3ClkPolarity << _PDM_CFG0_CH3CLKPOL_SHIFT) in PDM_Init()
91 | ((uint32_t)init->ch2ClkPolarity << _PDM_CFG0_CH2CLKPOL_SHIFT) in PDM_Init()
92 | ((uint32_t)init->ch1ClkPolarity << _PDM_CFG0_CH1CLKPOL_SHIFT) in PDM_Init()
93 | ((uint32_t)init->ch0ClkPolarity << _PDM_CFG0_CH0CLKPOL_SHIFT) in PDM_Init()
94 | ((uint32_t)init->fifoValidWatermark << _PDM_CFG0_FIFODVL_SHIFT) in PDM_Init()
95 | ((uint32_t)init->dataFormat << _PDM_CFG0_DATAFORMAT_SHIFT) in PDM_Init()
[all …]
Dem_wdog.c203 void WDOGn_Init(WDOG_TypeDef *wdog, const WDOG_Init_TypeDef *init) in WDOGn_Init() argument
220 wdog->CFG = (init->debugRun ? WDOG_CFG_DEBUGRUN : 0U) in WDOGn_Init()
221 | (init->clrSrc ? WDOG_CFG_CLRSRC : 0U) in WDOGn_Init()
223 | (init->em1Run ? WDOG_CFG_EM1RUN : 0U) in WDOGn_Init()
225 | (init->em2Run ? WDOG_CFG_EM2RUN : 0U) in WDOGn_Init()
226 | (init->em3Run ? WDOG_CFG_EM3RUN : 0U) in WDOGn_Init()
227 | (init->em4Block ? WDOG_CFG_EM4BLOCK : 0U) in WDOGn_Init()
228 | (init->prs0MissRstEn ? WDOG_CFG_PRS0MISSRSTEN : 0U) in WDOGn_Init()
229 | (init->prs1MissRstEn ? WDOG_CFG_PRS1MISSRSTEN : 0U) in WDOGn_Init()
230 | (init->resetDisable ? WDOG_CFG_WDOGRSTDIS : 0U) in WDOGn_Init()
[all …]
Dem_pcnt.c512 void PCNT_Init(PCNT_TypeDef *pcnt, const PCNT_Init_TypeDef *init) in PCNT_Init() argument
523 EFM_ASSERT((1 << PCNT0_CNT_SIZE) > init->counter); in PCNT_Init()
524 EFM_ASSERT((1 << PCNT0_CNT_SIZE) > init->top); in PCNT_Init()
530 EFM_ASSERT((1 << PCNT1_CNT_SIZE) > init->counter); in PCNT_Init()
531 EFM_ASSERT((1 << PCNT1_CNT_SIZE) > init->top); in PCNT_Init()
537 EFM_ASSERT((1 << PCNT2_CNT_SIZE) > init->counter); in PCNT_Init()
538 EFM_ASSERT((1 << PCNT2_CNT_SIZE) > init->top); in PCNT_Init()
552 tmp |= ((uint32_t)init->s0PRS << _PCNT_INPUT_S0PRSSEL_SHIFT) in PCNT_Init()
553 | ((uint32_t)init->s1PRS << _PCNT_INPUT_S1PRSSEL_SHIFT); in PCNT_Init()
560 if (init->negEdge) { in PCNT_Init()
[all …]
Dem_usart.c762 void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init) in USART_InitAsync() argument
778 if (init->mvdis) { in USART_InitAsync()
785 if (init->prsRxEnable) { in USART_InitAsync()
786 prsRxInput(usart, init->prsRxCh); in USART_InitAsync()
791 usart->FRAME = (uint32_t)init->databits in USART_InitAsync()
792 | (uint32_t)init->stopbits in USART_InitAsync()
793 | (uint32_t)init->parity; in USART_InitAsync()
796 USART_BaudrateAsyncSet(usart, init->refFreq, init->baudrate, init->oversampling); in USART_InitAsync()
798 if (init->autoCsEnable) { in USART_InitAsync()
801 if (init->csInv) { in USART_InitAsync()
[all …]
Dem_gpcrc.c67 void GPCRC_Init(GPCRC_TypeDef * gpcrc, const GPCRC_Init_TypeDef * init) argument
72 if (init->crcPoly == 0x04C11DB7) {
76 EFM_ASSERT((init->crcPoly & 0xFFFF0000UL) == 0U);
82 revPoly = SL_RBIT16(init->crcPoly);
86 if (init->enable) {
92 gpcrc->CTRL = (((uint32_t)init->autoInit << _GPCRC_CTRL_AUTOINIT_SHIFT)
93 | ((uint32_t)init->reverseByteOrder << _GPCRC_CTRL_BYTEREVERSE_SHIFT)
94 | ((uint32_t)init->reverseBits << _GPCRC_CTRL_BITREVERSE_SHIFT)
95 | ((uint32_t)init->enableByteMode << _GPCRC_CTRL_BYTEMODE_SHIFT)
98 gpcrc->CTRL = (((uint32_t)init->autoInit << _GPCRC_CTRL_AUTOINIT_SHIFT)
[all …]
Dem_lesense.c117 void LESENSE_Init(const LESENSE_Init_TypeDef * init, bool reqReset) in LESENSE_Init() argument
120 EFM_ASSERT((uint32_t)init->timeCtrl.startDelay < 4U); in LESENSE_Init()
122 EFM_ASSERT((uint32_t)init->perCtrl.dacPresc < 32U); in LESENSE_Init()
146 LESENSE_StartDelaySet((uint32_t)init->timeCtrl.startDelay); in LESENSE_Init()
150 | (init->timeCtrl.delayAuxStartup << _LESENSE_TIMCTRL_AUXSTARTUP_SHIFT); in LESENSE_Init()
162 ((uint32_t)init->coreCtrl.prsSel << _LESENSE_CTRL_PRSSEL_SHIFT) in LESENSE_Init()
163 | (uint32_t)init->coreCtrl.scanConfSel in LESENSE_Init()
164 | (uint32_t)init->coreCtrl.bufTrigLevel in LESENSE_Init()
165 | (uint32_t)init->coreCtrl.wakeupOnDMA in LESENSE_Init()
167 | ((uint32_t)init->coreCtrl.invACMP0 << _LESENSE_CTRL_ACMP0INV_SHIFT) in LESENSE_Init()
[all …]

12345