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Searched refs:iPMU_SPARE_REG1_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/src/iPMU_prog/iPMU_dotc/
Dipmu_apis.c230 update_ipmu_data(iPMU_SPARE_REG1_OFFSET, ULP_SPI, data, mask); in update_ipmu_calib_data()
707 PMU_DIRECT_ACCESS(iPMU_SPARE_REG1_OFFSET); //Dummy read in configure_uulp_gpio_to_1p8v()
708 PMU_DIRECT_ACCESS(iPMU_SPARE_REG1_OFFSET) |= BIT(13); in configure_uulp_gpio_to_1p8v()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_ipmu.h216 #define iPMU_SPARE_REG1_OFFSET 0x140 macro
244 #define iPMU_SPARE_REG1_OFFSET 0x140 macro
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ipmu.c1403 ULP_SPI_MEM_MAP(iPMU_SPARE_REG1_OFFSET) |= BIT(18) | BIT(19); in RSI_IPMU_32KHzROClkClib()
1407 ULP_SPI_MEM_MAP(iPMU_SPARE_REG1_OFFSET) &= ~((BIT(18) | BIT(19))); in RSI_IPMU_32KHzROClkClib()