| /hal_silabs-latest/si32/si32Hal/SI32_Modules/ |
| D | SI32_DCDC_A_Type.c | 210 uint32_t divider) in _SI32_DCDC_A_select_clock_divider() argument
212 assert((divider >= 0) && (divider <= 4)); in _SI32_DCDC_A_select_clock_divider()
215 basePointer->CONTROL_SET = divider << SI32_DCDC_A_CONTROL_CLKDIV_SHIFT; in _SI32_DCDC_A_select_clock_divider()
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| D | SI32_PLL_A_Type.c | 41 uint32_t divider, in _SI32_PLL_A_initialize() argument
50 basePointer->DIVIDER.U32 = divider; in _SI32_PLL_A_initialize()
65 uint32_t divider) in _SI32_PLL_A_write_divider() argument
68 basePointer->DIVIDER.U32 = divider; in _SI32_PLL_A_write_divider()
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| D | SI32_PLL_A_Type.h | 81 #define SI32_PLL_A_initialize(basePointer, divider, control, sspr, calconfig) do{ \ argument
82 basePointer->DIVIDER.U32 = divider;\
105 #define SI32_PLL_A_write_divider(basePointer, divider) \ argument
106 (basePointer->DIVIDER.U32 = divider)
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| D | SI32_PCA_A_Type.c | 325 uint32_t divider) in _SI32_PCA_A_set_clock_divider() argument
327 assert(divider < 1024); // divider < 2^10 in _SI32_PCA_A_set_clock_divider()
329 basePointer->CONTROL.DIV = divider; in _SI32_PCA_A_set_clock_divider()
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| D | SI32_DCDC_A_Type.h | 266 #define SI32_DCDC_A_select_clock_divider(basePointer, divider) do{ \ argument
268 basePointer->CONTROL_SET = divider << SI32_DCDC_A_CONTROL_CLKDIV_SHIFT;\
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| D | SI32_PCA_A_Type.h | 407 #define SI32_PCA_A_set_clock_divider(basePointer, divider) \ argument
408 (basePointer->CONTROL.DIV = divider)
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| D | SI32_EPCA_A_Type.c | 797 uint32_t divider) in _SI32_EPCA_A_set_clock_divider() argument
799 assert(divider < 1024); // divider < 2^10 in _SI32_EPCA_A_set_clock_divider()
802 basePointer->CONTROL_SET = divider << SI32_EPCA_A_CONTROL_DIV_SHIFT; in _SI32_EPCA_A_set_clock_divider()
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| D | SI32_EPCA_A_Type.h | 950 #define SI32_EPCA_A_set_clock_divider(basePointer, divider) do{ \ argument
952 basePointer->CONTROL_SET = divider << SI32_EPCA_A_CONTROL_DIV_SHIFT;\
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| /hal_silabs-latest/si32/si32Hal/sim3c1xx/ |
| D | SI32_CLKCTRL_A_Type.c | 180 uint32_t divider) in _SI32_CLKCTRL_A_select_ahb_divider() argument
182 assert((divider >= 0) && (divider <= 7)); in _SI32_CLKCTRL_A_select_ahb_divider()
184 basePointer->CONTROL.AHBDIV = divider; in _SI32_CLKCTRL_A_select_ahb_divider()
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| D | SI32_CLKCTRL_A_Type.h | 244 #define SI32_CLKCTRL_A_select_ahb_divider(basePointer, divider) \ argument
245 (basePointer->CONTROL.AHBDIV = divider)
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| /hal_silabs-latest/si32/si32Hal/sim3u1xx/ |
| D | SI32_CLKCTRL_A_Type.c | 194 uint32_t divider) in _SI32_CLKCTRL_A_select_ahb_divider() argument
196 assert((divider >= 0) && (divider <= 7)); in _SI32_CLKCTRL_A_select_ahb_divider()
198 basePointer->CONTROL.AHBDIV = divider; in _SI32_CLKCTRL_A_select_ahb_divider()
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| D | SI32_CLKCTRL_A_Type.h | 257 #define SI32_CLKCTRL_A_select_ahb_divider(basePointer, divider) \ argument
258 (basePointer->CONTROL.AHBDIV = divider)
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| /hal_silabs-latest/si32/si32Hal/sim3l1xx/ |
| D | SI32_CLKCTRL_A_Type.c | 196 uint32_t divider) in _SI32_CLKCTRL_A_select_ahb_divider() argument
198 assert((divider >= 0) && (divider <= 7)); in _SI32_CLKCTRL_A_select_ahb_divider()
200 basePointer->CONTROL.AHBDIV = divider; in _SI32_CLKCTRL_A_select_ahb_divider()
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| D | SI32_CLKCTRL_A_Type.h | 264 #define SI32_CLKCTRL_A_select_ahb_divider(basePointer, divider) \ argument
265 (basePointer->CONTROL.AHBDIV = divider)
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| /hal_silabs-latest/simplicity_sdk/platform/service/clock_manager/src/ |
| D | sli_clock_manager_hal.h | 83 uint16_t divider,
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| D | sl_clock_manager_hal_s2.c | 548 uint16_t divider, in sli_clock_manager_hal_set_gpio_clock_output() argument
612 …CMU_ClkOutPinConfig((uint32_t)output_select, cmu_clock_select, (CMU_ClkDiv_TypeDef)divider, port, … in sli_clock_manager_hal_set_gpio_clock_output()
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