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Searched refs:clkSource (Results 1 – 7 of 7) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ulpss_clk.c152 ULP_SSI_CLK_SELECT_T clkSource, in ulpss_ulp_ssi_clk_config() argument
156 …if ((pULPCLK == NULL) || (divFactor > ULP_SSI_MAX_DIVISION_FACTOR) || (clkSource > ULP_SSI_MAX_SEL… in ulpss_ulp_ssi_clk_config()
162 switch (clkSource) { in ulpss_ulp_ssi_clk_config()
168 pULPCLK->ULP_I2C_SSI_CLK_GEN_REG_b.ULP_SSI_CLK_SEL = clkSource; in ulpss_ulp_ssi_clk_config()
175 pULPCLK->ULP_I2C_SSI_CLK_GEN_REG_b.ULP_SSI_CLK_SEL = clkSource; in ulpss_ulp_ssi_clk_config()
182 pULPCLK->ULP_I2C_SSI_CLK_GEN_REG_b.ULP_SSI_CLK_SEL = clkSource; in ulpss_ulp_ssi_clk_config()
190 pULPCLK->ULP_I2C_SSI_CLK_GEN_REG_b.ULP_SSI_CLK_SEL = clkSource; in ulpss_ulp_ssi_clk_config()
197 pULPCLK->ULP_I2C_SSI_CLK_GEN_REG_b.ULP_SSI_CLK_SEL = clkSource; in ulpss_ulp_ssi_clk_config()
203 pULPCLK->ULP_I2C_SSI_CLK_GEN_REG_b.ULP_SSI_CLK_SEL = clkSource; in ulpss_ulp_ssi_clk_config()
207 pULPCLK->ULP_I2C_SSI_CLK_GEN_REG_b.ULP_SSI_CLK_SEL = clkSource; in ulpss_ulp_ssi_clk_config()
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Drsi_pll.c1372 QSPI_CLK_SRC_SEL_T clkSource, in clk_qspi_clk_config() argument
1388 switch (clkSource) { in clk_qspi_clk_config()
1390 pCLK->CLK_CONFIG_REG1_b.QSPI_CLK_SEL = clkSource; in clk_qspi_clk_config()
1418 pCLK->CLK_CONFIG_REG1_b.QSPI_CLK_SEL = clkSource; in clk_qspi_clk_config()
1466 QSPI_CLK_SRC_SEL_T clkSource, in clk_qspi_2_clk_config() argument
1481 switch (clkSource) { in clk_qspi_2_clk_config()
1564 SSI_MST_CLK_SRC_SEL_T clkSource, in clk_ssi_mst_clk_config() argument
1575 switch (clkSource) { in clk_ssi_mst_clk_config()
1643 SDMEM_CLK_SRC_SEL_T clkSource, in clk_sd_mem_clk_config() argument
1653 switch (clkSource) { in clk_sd_mem_clk_config()
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/rom_driver/inc/
Drsi_rom_ulpss_clk.h75 STATIC INLINE rsi_error_t RSI_ULPSS_RefClkConfig(ULPSS_REF_CLK_SEL_T clkSource) in RSI_ULPSS_RefClkConfig() argument
78 if (clkSource == ULPSS_40MHZ_CLK) { in RSI_ULPSS_RefClkConfig()
83 return ulpss_ref_clk_config(clkSource); in RSI_ULPSS_RefClkConfig()
128 ULP_PROC_CLK_SELECT_T clkSource, in RSI_ULPSS_UlpProcClkConfig() argument
132 return ulpss_ulp_proc_clk_config(pULPCLK, clkSource, divFactor, delayFn); in RSI_ULPSS_UlpProcClkConfig()
330 ULP_SSI_CLK_SELECT_T clkSource, in RSI_ULPSS_UlpSsiClkConfig() argument
334 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_ssi_clk_config(pULPCLK, clkType, clkSource, divFactor); in RSI_ULPSS_UlpSsiClkConfig()
336 return ulpss_ulp_ssi_clk_config(pULPCLK, clkType, clkSource, divFactor); in RSI_ULPSS_UlpSsiClkConfig()
364 ULP_I2S_CLK_SELECT_T clkSource, in RSI_ULPSS_UlpI2sClkConfig() argument
368 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_i2s_clk_config(pULPCLK, clkSource, divFactor); in RSI_ULPSS_UlpI2sClkConfig()
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Drsi_rom_clks.h1081 …C INLINE rsi_error_t RSI_CLK_M4ssRefClkConfig(const M4CLK_Type *pCLK, M4SS_REF_CLK_SEL_T clkSource) in RSI_CLK_M4ssRefClkConfig() argument
1084 if (clkSource == EXT_40MHZ_CLK) { in RSI_CLK_M4ssRefClkConfig()
1089 return clk_m4ss_ref_clk_config(pCLK, clkSource); in RSI_CLK_M4ssRefClkConfig()
1105 STATIC INLINE rsi_error_t RSI_CLK_M4SocClkConfig(M4CLK_Type *pCLK, M4_SOC_CLK_SRC_SEL_T clkSource, … in RSI_CLK_M4SocClkConfig() argument
1107 return clk_m4_soc_clk_config(pCLK, clkSource, divFactor); in RSI_CLK_M4SocClkConfig()
1129 QSPI_CLK_SRC_SEL_T clkSource, in RSI_CLK_QspiClkConfig() argument
1135 return ROMAPI_M4SS_CLK_API->clk_qspi_clk_config(pCLK, clkSource, swalloEn, OddDivEn, divFactor); in RSI_CLK_QspiClkConfig()
1137 return clk_qspi_clk_config(pCLK, clkSource, swalloEn, OddDivEn, divFactor); in RSI_CLK_QspiClkConfig()
1161 QSPI_CLK_SRC_SEL_T clkSource, in RSI_CLK_Qspi2ClkConfig() argument
1167 return ROMAPI_M4SS_CLK_API->clk_qspi_2_clk_config(pCLK, clkSource, swalloEn, OddDivEn, divFactor); in RSI_CLK_Qspi2ClkConfig()
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Drsi_rom_table_si91x.h786 ULP_SSI_CLK_SELECT_T clkSource,
789 …rsi_error_t (*ulpss_ulp_i2s_clk_config)(ULPCLK_Type *pULPCLK, ULP_I2S_CLK_SELECT_T clkSource, uint…
794 ULP_UART_CLK_SELECT_T clkSource,
801 ULP_TIMER_CLK_SELECT_T clkSource,
804 …*ulpss_aux_clk_config)(ULPCLK_Type *pULPCLK, CLK_ENABLE_T clkType, ULP_AUX_CLK_SELECT_T clkSource);
807 ULP_VAD_CLK_SELECT_T clkSource,
811 …rsi_error_t (*ulpss_touch_clk_config)(ULPCLK_Type *pULPCLK, ULP_TOUCH_CLK_SELECT_T clkSource, uint…
884 QSPI_CLK_SRC_SEL_T clkSource,
892 USART_CLK_SRC_SEL_T clkSource,
896 SSI_MST_CLK_SRC_SEL_T clkSource,
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/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_ulpss_clk.h303 ULP_PROC_CLK_SELECT_T clkSource,
306 rsi_error_t ulpss_ref_clk_config(ULPSS_REF_CLK_SEL_T clkSource);
311 ULP_PROC_CLK_SELECT_T clkSource,
325 ULP_SSI_CLK_SELECT_T clkSource,
328 rsi_error_t ulpss_ulp_i2s_clk_config(ULPCLK_Type *pULPCLK, ULP_I2S_CLK_SELECT_T clkSource, uint16_t…
333 ULP_UART_CLK_SELECT_T clkSource,
339 ULP_TIMER_CLK_SELECT_T clkSource,
342 …t ulpss_aux_clk_config(ULPCLK_Type *pULPCLK, CLK_ENABLE_T clkType, ULP_AUX_CLK_SELECT_T clkSource);
345 ULP_VAD_CLK_SELECT_T clkSource,
349 rsi_error_t ulpss_touch_clk_config(ULPCLK_Type *pULPCLK, ULP_TOUCH_CLK_SELECT_T clkSource, uint16_t…
Drsi_pll.h752 QSPI_CLK_SRC_SEL_T clkSource,
758 QSPI_CLK_SRC_SEL_T clkSource,
767 USART_CLK_SRC_SEL_T clkSource,
772 SSI_MST_CLK_SRC_SEL_T clkSource,
777 SDMEM_CLK_SRC_SEL_T clkSource,
780 rsi_error_t clk_ct_clk_config(M4CLK_Type *pCLK, CT_CLK_SRC_SEL_T clkSource, uint32_t divFactor, CLK…
782 rsi_error_t clk_cci_clk_config(M4CLK_Type *pCLK, CCI_CLK_SRC_SEL_T clkSource, uint32_t divFactor, C…
784 rsi_error_t clk_i2s_clk_config(M4CLK_Type *pCLK, I2S_CLK_SRC_SEL_T clkSource, uint32_t divFactor);
786 rsi_error_t clk_mcu_clk_cut_config(M4CLK_Type *pCLK, MCU_CLKOUT_SRC_SEL_T clkSource, uint32_t divFa…
792 ETHERNET_CLK_SRC_SEL_T clkSource,
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