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Searched refs:clkEnable (Results 1 – 7 of 7) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/rom_driver/inc/
Drsi_rom_clks.h104 STATIC INLINE rsi_error_t RSI_CLK_SocPllClkEnable(boolean_t clkEnable) in RSI_CLK_SocPllClkEnable() argument
107 return ROMAPI_M4SS_CLK_API->clk_soc_pll_clk_enable(clkEnable); in RSI_CLK_SocPllClkEnable()
109 return clk_soc_pll_clk_enable(clkEnable); in RSI_CLK_SocPllClkEnable()
237 STATIC INLINE rsi_error_t RSI_CLK_SocPllClkBypassEnable(boolean_t clkEnable) in RSI_CLK_SocPllClkBypassEnable() argument
240 return ROMAPI_M4SS_CLK_API->clk_soc_pll_clk_bypass_enable(clkEnable); in RSI_CLK_SocPllClkBypassEnable()
242 return clk_soc_pll_clk_bypass_enable(clkEnable); in RSI_CLK_SocPllClkBypassEnable()
299 STATIC INLINE rsi_error_t RSI_CLK_I2sPllClkEnable(boolean_t clkEnable) in RSI_CLK_I2sPllClkEnable() argument
302 return ROMAPI_M4SS_CLK_API->clk_i2s_pll_clk_enable(clkEnable); in RSI_CLK_I2sPllClkEnable()
304 return clk_i2s_pll_clk_enable(clkEnable); in RSI_CLK_I2sPllClkEnable()
316 STATIC INLINE rsi_error_t RSI_CLK_I2sPllClkBypassEnable(boolean_t clkEnable) in RSI_CLK_I2sPllClkBypassEnable() argument
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Drsi_rom_ulpss_clk.h100 boolean_t clkEnable, in RSI_ULPSS_ClockConfig() argument
105 return ROMAPI_ULPSS_CLK_API->ulpss_clock_config(pCLK, clkEnable, divFactor, oddDivFactor); in RSI_ULPSS_ClockConfig()
107 return ulpss_clock_config(pCLK, clkEnable, divFactor, oddDivFactor); in RSI_ULPSS_ClockConfig()
583 STATIC INLINE rsi_error_t RSI_ULPSS_SlpSensorClkConfig(ULPCLK_Type *pULPCLK, boolean_t clkEnable, u… in RSI_ULPSS_SlpSensorClkConfig() argument
586 return ROMAPI_ULPSS_CLK_API->ulpss_slp_sensor_clk_config(pULPCLK, clkEnable, divFactor); in RSI_ULPSS_SlpSensorClkConfig()
588 return ulpss_slp_sensor_clk_config(pULPCLK, clkEnable, divFactor); in RSI_ULPSS_SlpSensorClkConfig()
629 rsi_error_t RSI_ULPSS_ClockConfig(M4CLK_Type *pCLK, boolean_t clkEnable, uint16_t divFactor, boolea…
672 rsi_error_t RSI_ULPSS_SlpSensorClkConfig(ULPCLK_Type *pULPCLK, boolean_t clkEnable, uint32_t divFac…
Drsi_rom_table_si91x.h774 …rsi_error_t (*ulpss_clock_config)(M4CLK_Type *pCLK, boolean_t clkEnable, uint16_t divFactor, boole…
813 …rsi_error_t (*ulpss_slp_sensor_clk_config)(ULPCLK_Type *pULPCLK, boolean_t clkEnable, uint32_t div…
825 rsi_error_t (*clk_soc_pll_clk_enable)(boolean_t clkEnable);
836 rsi_error_t (*clk_soc_pll_clk_bypass_enable)(boolean_t clkEnable);
841 rsi_error_t (*clk_i2s_pll_clk_enable)(boolean_t clkEnable);
842 rsi_error_t (*clk_i2s_pll_clk_bypass_enable)(boolean_t clkEnable);
855 rsi_error_t (*clk_intf_pll_clk_enable)(boolean_t clkEnable);
867 rsi_error_t (*clk_intf_pll_clk_bypass_enable)(boolean_t clkEnable);
938 rsi_error_t (*clk_i2c_clk_config)(M4CLK_Type *pCLK, boolean_t clkEnable, EN_I2C_T enI2C);
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_pll.h664 rsi_error_t clk_soc_pll_clk_enable(boolean_t clkEnable);
677 rsi_error_t clk_soc_pll_clk_bypass_enable(boolean_t clkEnable);
687 rsi_error_t clk_i2s_pll_clk_enable(boolean_t clkEnable);
689 rsi_error_t clk_i2s_pll_clk_bypass_enable(boolean_t clkEnable);
708 rsi_error_t clk_intf_pll_clk_enable(boolean_t clkEnable);
723 rsi_error_t clk_intf_pll_clk_bypass_enable(boolean_t clkEnable);
819 rsi_error_t clk_i2c_clk_config(M4CLK_Type *pCLK, boolean_t clkEnable, EN_I2C_T enI2C);
Drsi_ulpss_clk.h308 rsi_error_t ulpss_clock_config(M4CLK_Type *pCLK, boolean_t clkEnable, uint16_t divFactor, boolean_t…
351 rsi_error_t ulpss_slp_sensor_clk_config(ULPCLK_Type *pULPCLK, boolean_t clkEnable, uint32_t divFact…
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_pll.c74 rsi_error_t clk_soc_pll_clk_enable(boolean_t clkEnable) in clk_soc_pll_clk_enable() argument
76 if (clkEnable == Enable) { in clk_soc_pll_clk_enable()
405 rsi_error_t clk_soc_pll_clk_bypass_enable(boolean_t clkEnable) in clk_soc_pll_clk_bypass_enable() argument
407 if (clkEnable == Enable) { in clk_soc_pll_clk_bypass_enable()
492 rsi_error_t clk_i2s_pll_clk_enable(boolean_t clkEnable) in clk_i2s_pll_clk_enable() argument
494 if (clkEnable == Enable) { in clk_i2s_pll_clk_enable()
512 rsi_error_t clk_i2s_pll_clk_bypass_enable(boolean_t clkEnable) in clk_i2s_pll_clk_bypass_enable() argument
514 if (clkEnable == Enable) { in clk_i2s_pll_clk_bypass_enable()
761 rsi_error_t clk_intf_pll_clk_enable(boolean_t clkEnable) in clk_intf_pll_clk_enable() argument
763 if (clkEnable == Enable) { in clk_intf_pll_clk_enable()
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Drsi_ulpss_clk.c49 rsi_error_t ulpss_clock_config(M4CLK_Type *pCLK, boolean_t clkEnable, uint16_t divFactor, boolean_t… in ulpss_clock_config() argument
54 if (clkEnable == Enable) { in ulpss_clock_config()
784 rsi_error_t ulpss_slp_sensor_clk_config(ULPCLK_Type *pULPCLK, boolean_t clkEnable, uint32_t divFact… in ulpss_slp_sensor_clk_config() argument
790 if (clkEnable) { in ulpss_slp_sensor_clk_config()