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Searched refs:basePointer (Results 1 – 25 of 164) sorted by relevance

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/hal_silabs-latest/si32/si32Hal/SI32_Modules/
DSI32_USART_B_Type.c39 SI32_USART_B_Type * basePointer, in _SI32_USART_B_initialize() argument
57 basePointer->CONFIG.U32 = config; in _SI32_USART_B_initialize()
58 basePointer->MODE.U32 = mode; in _SI32_USART_B_initialize()
59 basePointer->FLOWCN.U32 = flowcn; in _SI32_USART_B_initialize()
60 basePointer->CONTROL.U32 = control; in _SI32_USART_B_initialize()
61 basePointer->IPDELAY.U32 = ipdelay; in _SI32_USART_B_initialize()
62 basePointer->BAUDRATE.U32 = baudrate; in _SI32_USART_B_initialize()
63 basePointer->FIFOCN.U32 = fifocn; in _SI32_USART_B_initialize()
74 SI32_USART_B_Type * basePointer, in _SI32_USART_B_write_config() argument
78 basePointer->CONFIG.U32 = config; in _SI32_USART_B_write_config()
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DSI32_USART_A_Type.c39 SI32_USART_A_Type * basePointer, in _SI32_USART_A_initialize() argument
56 basePointer->CONFIG.U32 = config; in _SI32_USART_A_initialize()
57 basePointer->MODE.U32 = mode; in _SI32_USART_A_initialize()
58 basePointer->FLOWCN.U32 = flowcn; in _SI32_USART_A_initialize()
59 basePointer->CONTROL.U32 = control; in _SI32_USART_A_initialize()
60 basePointer->IPDELAY.U32 = ipdelay; in _SI32_USART_A_initialize()
61 basePointer->BAUDRATE.U32 = baudrate; in _SI32_USART_A_initialize()
62 basePointer->FIFOCN.U32 = fifocn; in _SI32_USART_A_initialize()
73 SI32_USART_A_Type * basePointer, in _SI32_USART_A_write_config() argument
77 basePointer->CONFIG.U32 = config; in _SI32_USART_A_write_config()
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DSI32_SARADC_A_Type.c40 SI32_SARADC_A_Type * basePointer, in _SI32_SARADC_A_initialize() argument
49 basePointer->CONFIG.U32 = config; in _SI32_SARADC_A_initialize()
50 basePointer->CONTROL.U32 = control; in _SI32_SARADC_A_initialize()
51 basePointer->WCLIMITS.U32 = wclimits; in _SI32_SARADC_A_initialize()
61 SI32_SARADC_A_Type * basePointer, in _SI32_SARADC_A_initialize_channels() argument
72 basePointer->CHAR10.U32 = char10; in _SI32_SARADC_A_initialize_channels()
73 basePointer->CHAR32.U32 = char32; in _SI32_SARADC_A_initialize_channels()
74 basePointer->SQ3210.U32 = sq3210; in _SI32_SARADC_A_initialize_channels()
75 basePointer->SQ7654.U32 = sq7654; in _SI32_SARADC_A_initialize_channels()
86 SI32_SARADC_A_Type * basePointer, in _SI32_SARADC_A_write_config() argument
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DSI32_ACCTR_A_Type.c40 SI32_ACCTR_A_Type * basePointer, in _SI32_ACCTR_A_initialize_module() argument
53 basePointer->CONFIG.U32=config; in _SI32_ACCTR_A_initialize_module()
54 basePointer->CONTROL.U32=control; in _SI32_ACCTR_A_initialize_module()
55 basePointer->LCCONFIG.U32=lcconfig; in _SI32_ACCTR_A_initialize_module()
56 basePointer->TIMING.U32=lctiming; in _SI32_ACCTR_A_initialize_module()
57 basePointer->LCMODE.U32=lcmode; in _SI32_ACCTR_A_initialize_module()
58 basePointer->LCCLKCONTROL.U32=lcclkcontrol; in _SI32_ACCTR_A_initialize_module()
59 basePointer->LCCOUNT.U32=lccount; in _SI32_ACCTR_A_initialize_module()
60 basePointer->DBCONFIG.U32=dbconfig; in _SI32_ACCTR_A_initialize_module()
61 basePointer->COMP0.U32=comp0; in _SI32_ACCTR_A_initialize_module()
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DSI32_UART_A_Type.c39 SI32_UART_A_Type * basePointer, in _SI32_UART_A_initialize() argument
56 basePointer->CONFIG.U32 = config; in _SI32_UART_A_initialize()
57 basePointer->MODE.U32 = mode; in _SI32_UART_A_initialize()
58 basePointer->FLOWCN.U32 = flowcn; in _SI32_UART_A_initialize()
59 basePointer->CONTROL.U32 = control; in _SI32_UART_A_initialize()
60 basePointer->IPDELAY.U32 = ipdelay; in _SI32_UART_A_initialize()
61 basePointer->BAUDRATE.U32 = baudrate; in _SI32_UART_A_initialize()
62 basePointer->FIFOCN.U32 = fifocn; in _SI32_UART_A_initialize()
73 SI32_UART_A_Type * basePointer, in _SI32_UART_A_write_config() argument
77 basePointer->CONFIG.U32 = config; in _SI32_UART_A_write_config()
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DSI32_I2S_A_Type.c39 SI32_I2S_A_Type * basePointer, in _SI32_I2S_A_initialize() argument
62 basePointer->TXCONTROL.U32 = txcontrol; in _SI32_I2S_A_initialize()
63 basePointer->TXMODE.U32 = txmode; in _SI32_I2S_A_initialize()
64 basePointer->FSDUTY.U32 = fsduty; in _SI32_I2S_A_initialize()
65 basePointer->RXCONTROL.U32 = rxcontrol; in _SI32_I2S_A_initialize()
66 basePointer->RXMODE.U32 = rxmode; in _SI32_I2S_A_initialize()
67 basePointer->CLKCONTROL.U32 = clkcontrol; in _SI32_I2S_A_initialize()
68 basePointer->FIFOCONTROL.U32 = fifocontrol; in _SI32_I2S_A_initialize()
69 basePointer->INTCONTROL.U32 = intcontrol; in _SI32_I2S_A_initialize()
70 basePointer->DMACONTROL.U32 = dmacontrol; in _SI32_I2S_A_initialize()
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DSI32_USB_A_Type.c39 SI32_USB_A_Type * basePointer, in _SI32_USB_A_initialize() argument
66 basePointer->FADDR.U32 = faddr; in _SI32_USB_A_initialize()
67 basePointer->POWER.U32 = power; in _SI32_USB_A_initialize()
68 basePointer->IOINT.U32 = ioint; in _SI32_USB_A_initialize()
69 basePointer->CMINT.U32 = cmint; in _SI32_USB_A_initialize()
70 basePointer->IOINTE.U32 = iointe; in _SI32_USB_A_initialize()
71 basePointer->CMINTEPE.U32 = cmintepe; in _SI32_USB_A_initialize()
72 basePointer->CRCONTROL.U32 = crcontrol; in _SI32_USB_A_initialize()
73 basePointer->TCONTROL.U32 = tcontrol; in _SI32_USB_A_initialize()
74 basePointer->CLKSEL.U32 = clksel; in _SI32_USB_A_initialize()
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DSI32_USART_B_Type.h102 #define SI32_USART_B_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifo… argument
103 _SI32_USART_B_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifocn)
124 #define SI32_USART_B_write_config(basePointer, config) \ argument
125 (basePointer->CONFIG.U32 = config)
140 #define SI32_USART_B_read_config(basePointer) \ argument
141 (basePointer->CONFIG.U32)
153 #define SI32_USART_B_enable_rx_start_bit(basePointer) \ argument
154 (basePointer->CONFIG_SET = SI32_USART_B_CONFIG_RSTRTEN_ENABLED_U32)
166 #define SI32_USART_B_disable_rx_start_bit(basePointer) \ argument
167 (basePointer->CONFIG_CLR = SI32_USART_B_CONFIG_RSTRTEN_MASK)
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DSI32_UART_B_Type.c39 SI32_UART_B_Type * basePointer, in _SI32_UART_B_initialize() argument
59 basePointer->CONFIG.U32 = config; in _SI32_UART_B_initialize()
60 basePointer->MODE.U32 = mode; in _SI32_UART_B_initialize()
61 basePointer->FLOWCN.U32 = flowcn; in _SI32_UART_B_initialize()
62 basePointer->CONTROL.U32 = control; in _SI32_UART_B_initialize()
63 basePointer->IPDELAY.U32 = ipdelay; in _SI32_UART_B_initialize()
64 basePointer->BAUDRATE.U32 = baudrate; in _SI32_UART_B_initialize()
65 basePointer->FIFOCN.U32 = fifocn; in _SI32_UART_B_initialize()
66 basePointer->CLKDIV.U32 = clkdiv; in _SI32_UART_B_initialize()
77 SI32_UART_B_Type * basePointer, in _SI32_UART_B_write_config() argument
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DSI32_USART_A_Type.h102 #define SI32_USART_A_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifo… argument
103 _SI32_USART_A_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifocn)
124 #define SI32_USART_A_write_config(basePointer, config) \ argument
125 (basePointer->CONFIG.U32 = config)
140 #define SI32_USART_A_read_config(basePointer) \ argument
141 (basePointer->CONFIG.U32)
153 #define SI32_USART_A_enable_rx_start_bit(basePointer) \ argument
154 (basePointer->CONFIG_SET = SI32_USART_A_CONFIG_RSTRTEN_ENABLED_U32)
166 #define SI32_USART_A_disable_rx_start_bit(basePointer) \ argument
167 (basePointer->CONFIG_CLR = SI32_USART_A_CONFIG_RSTRTEN_MASK)
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DSI32_I2C_A_Type.c39 SI32_I2C_A_Type * basePointer, in _SI32_I2C_A_initialize() argument
58 basePointer->CONTROL.U32 = control; in _SI32_I2C_A_initialize()
59 basePointer->CONFIG.U32 = config; in _SI32_I2C_A_initialize()
60 basePointer->SADDRESS.U32 = saddress; in _SI32_I2C_A_initialize()
61 basePointer->SMASK.U32 = smask; in _SI32_I2C_A_initialize()
62 basePointer->TIMER.U32 = timer; in _SI32_I2C_A_initialize()
63 basePointer->TIMERRL.U32 = timerrl; in _SI32_I2C_A_initialize()
64 basePointer->SCONFIG.U32 = sconfig; in _SI32_I2C_A_initialize()
65 basePointer->I2CDMA.U32 = i2cdma; in _SI32_I2C_A_initialize()
76 SI32_I2C_A_Type * basePointer, in _SI32_I2C_A_write_control() argument
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DSI32_SARADC_A_Type.h77 #define SI32_SARADC_A_initialize(basePointer, config, control, wclimits) do{ \ argument
78 basePointer->CONFIG.U32 = config;\
79 basePointer->CONTROL.U32 = control;\
80 basePointer->WCLIMITS.U32 = wclimits;\
121 #define SI32_SARADC_A_initialize_channels(basePointer, char10, char32, sq3210, sq7654) do{ \ argument
122 basePointer->CHAR10.U32 = char10;\
123 basePointer->CHAR32.U32 = char32;\
124 basePointer->SQ3210.U32 = sq3210;\
125 basePointer->SQ7654.U32 = sq7654;\
147 #define SI32_SARADC_A_write_config(basePointer, config) \ argument
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DSI32_ACCTR_A_Type.h115 #define SI32_ACCTR_A_initialize_module(basePointer, config, control, lcconfig, lctiming, lcmode, lc… argument
116 basePointer->CONFIG.U32=config;\
117 basePointer->CONTROL.U32=control;\
118 basePointer->LCCONFIG.U32=lcconfig;\
119 basePointer->TIMING.U32=lctiming;\
120 basePointer->LCMODE.U32=lcmode;\
121 basePointer->LCCLKCONTROL.U32=lcclkcontrol;\
122 basePointer->LCCOUNT.U32=lccount;\
123 basePointer->DBCONFIG.U32=dbconfig;\
124 basePointer->COMP0.U32=comp0;\
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DSI32_SPI_B_Type.c39 SI32_SPI_B_Type * basePointer, in _SI32_SPI_B_initialize() argument
49 basePointer->CONTROL.U32 = control; in _SI32_SPI_B_initialize()
50 basePointer->CONFIG.U32 = config; in _SI32_SPI_B_initialize()
51 basePointer->CLKRATE.U32 = clkrate; in _SI32_SPI_B_initialize()
62 SI32_SPI_B_Type * basePointer, in _SI32_SPI_B_write_tx_fifo_u32() argument
67 basePointer->DATA.U32 = data_u32; in _SI32_SPI_B_write_tx_fifo_u32()
78 SI32_SPI_B_Type * basePointer, in _SI32_SPI_B_write_tx_fifo_u16() argument
84 basePointer->DATA.U16 = data_u16; in _SI32_SPI_B_write_tx_fifo_u16()
95 SI32_SPI_B_Type * basePointer, in _SI32_SPI_B_write_tx_fifo_u8() argument
101 basePointer->DATA.U8 = data_u8; in _SI32_SPI_B_write_tx_fifo_u8()
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DSI32_UART_A_Type.h102 #define SI32_UART_A_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifoc… argument
103 _SI32_UART_A_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifocn)
124 #define SI32_UART_A_write_config(basePointer, config) \ argument
125 (basePointer->CONFIG.U32 = config)
140 #define SI32_UART_A_read_config(basePointer) \ argument
141 (basePointer->CONFIG.U32)
153 #define SI32_UART_A_enable_rx_start_bit(basePointer) \ argument
154 (basePointer->CONFIG_SET = SI32_UART_A_CONFIG_RSTRTEN_ENABLED_U32)
166 #define SI32_UART_A_disable_rx_start_bit(basePointer) \ argument
167 (basePointer->CONFIG_CLR = SI32_UART_A_CONFIG_RSTRTEN_MASK)
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DSI32_USB_A_Type.h136 #define SI32_USB_A_initialize(basePointer, faddr, power, ioint, cmint, iointe, cmintepe, crcontrol,… argument
137 basePointer->FADDR.U32 = faddr;\
138 basePointer->POWER.U32 = power;\
139 basePointer->IOINT.U32 = ioint;\
140 basePointer->CMINT.U32 = cmint;\
141 basePointer->IOINTE.U32 = iointe;\
142 basePointer->CMINTEPE.U32 = cmintepe;\
143 basePointer->CRCONTROL.U32 = crcontrol;\
144 basePointer->TCONTROL.U32 = tcontrol;\
145 basePointer->CLKSEL.U32 = clksel;\
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DSI32_LCD_A_Type.c39 SI32_LCD_A_Type * basePointer) in _SI32_LCD_A_reset_module() argument
42 basePointer->CONFIG.U32 = 0x000C7E35; in _SI32_LCD_A_reset_module()
43 basePointer->CLKCONTROL.U32 = 0x14B0FC00; in _SI32_LCD_A_reset_module()
44 basePointer->CTRSTCONTROL.U32 = 0x32800000; in _SI32_LCD_A_reset_module()
45 basePointer->VBMCONTROL.U32 = 0xE2C00000; in _SI32_LCD_A_reset_module()
46 basePointer->BLKCONTROL.U32 = 0x00000000; in _SI32_LCD_A_reset_module()
47 basePointer->SEGCONTROL.U32 = 0x00000000; in _SI32_LCD_A_reset_module()
48 basePointer->SEGMASK0.U32 = 0x00000000; in _SI32_LCD_A_reset_module()
49 basePointer->SEGMASK1.U32 = 0x00000000; in _SI32_LCD_A_reset_module()
50 basePointer->SEGDATA0.U32 = 0x00000000; in _SI32_LCD_A_reset_module()
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DSI32_I2C_A_Type.h108 #define SI32_I2C_A_initialize(basePointer, control, config, saddress, smask, timer, timerrl, sconfi… argument
109 basePointer->CONTROL.U32 = control;\
110 basePointer->CONFIG.U32 = config;\
111 basePointer->SADDRESS.U32 = saddress;\
112 basePointer->SMASK.U32 = smask;\
113 basePointer->TIMER.U32 = timer;\
114 basePointer->TIMERRL.U32 = timerrl;\
115 basePointer->SCONFIG.U32 = sconfig;\
116 basePointer->I2CDMA.U32 = i2cdma;\
138 #define SI32_I2C_A_write_control(basePointer, control) \ argument
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DSI32_I2S_A_Type.h121 #define SI32_I2S_A_initialize(basePointer, txcontrol, txmode, fsduty, rxcontrol, rxmode, clkcontrol… argument
122 …_SI32_I2S_A_initialize(basePointer, txcontrol, txmode, fsduty, rxcontrol, rxmode, clkcontrol, fifo…
137 #define SI32_I2S_A_read_txcontrol(basePointer) \ argument
138 (basePointer->TXCONTROL.U32)
158 #define SI32_I2S_A_write_txcontrol(basePointer, txcontrol) \ argument
159 (basePointer->TXCONTROL.U32 = txcontrol)
171 #define SI32_I2S_A_enable_frame_sync(basePointer) \ argument
172 (basePointer->TXCONTROL_SET = SI32_I2S_A_TXCONTROL_FSGEN_MASK)
184 #define SI32_I2S_A_disable_frame_sync(basePointer) \ argument
185 (basePointer->TXCONTROL_CLR = SI32_I2S_A_TXCONTROL_FSGEN_MASK)
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DSI32_UART_B_Type.h109 #define SI32_UART_B_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifoc… argument
110 …_SI32_UART_B_initialize(basePointer, config, mode, flowcn, control, ipdelay, baudrate, fifocn, clk…
131 #define SI32_UART_B_write_config(basePointer, config) \ argument
132 (basePointer->CONFIG.U32 = config)
147 #define SI32_UART_B_read_config(basePointer) \ argument
148 (basePointer->CONFIG.U32)
160 #define SI32_UART_B_enable_rx_start_bit(basePointer) \ argument
161 (basePointer->CONFIG_SET = SI32_UART_B_CONFIG_RSTRTEN_ENABLED_U32)
173 #define SI32_UART_B_disable_rx_start_bit(basePointer) \ argument
174 (basePointer->CONFIG_CLR = SI32_UART_B_CONFIG_RSTRTEN_MASK)
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DSI32_TIMER_A_Type.c39 SI32_TIMER_A_Type * basePointer, in _SI32_TIMER_A_initialize() argument
50 basePointer->CONFIG.U32 = config; in _SI32_TIMER_A_initialize()
51 basePointer->CLKDIV.U32 = clkdiv; in _SI32_TIMER_A_initialize()
52 basePointer->COUNT.U32 = count; in _SI32_TIMER_A_initialize()
53 basePointer->CAPTURE.U32 = capture; in _SI32_TIMER_A_initialize()
64 SI32_TIMER_A_Type * basePointer, in _SI32_TIMER_A_write_config() argument
68 basePointer->CONFIG.U32 = config; in _SI32_TIMER_A_write_config()
79 SI32_TIMER_A_Type * basePointer) in _SI32_TIMER_A_read_config() argument
82 return basePointer->CONFIG.U32; in _SI32_TIMER_A_read_config()
92 SI32_TIMER_A_Type * basePointer) in _SI32_TIMER_A_select_low_clock_source_apb_clock() argument
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DSI32_LCD_A_Type.h52 #define SI32_LCD_A_reset_module(basePointer) do{ \ argument
53 basePointer->CONFIG.U32 = 0x000C7E35;\
54 basePointer->CLKCONTROL.U32 = 0x14B0FC00;\
55 basePointer->CTRSTCONTROL.U32 = 0x32800000;\
56 basePointer->VBMCONTROL.U32 = 0xE2C00000;\
57 basePointer->BLKCONTROL.U32 = 0x00000000;\
58 basePointer->SEGCONTROL.U32 = 0x00000000;\
59 basePointer->SEGMASK0.U32 = 0x00000000;\
60 basePointer->SEGMASK1.U32 = 0x00000000;\
61 basePointer->SEGDATA0.U32 = 0x00000000;\
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DSI32_SPI_B_Type.h76 #define SI32_SPI_B_initialize(basePointer, control, config, clkrate) do{ \ argument
77 basePointer->CONTROL.U32 = control;\
78 basePointer->CONFIG.U32 = config;\
79 basePointer->CLKRATE.U32 = clkrate;\
102 #define SI32_SPI_B_write_tx_fifo_u32(basePointer, data_u32) \ argument
103 (basePointer->DATA.U32 = data_u32)
125 #define SI32_SPI_B_write_tx_fifo_u16(basePointer, data_u16) \ argument
126 (basePointer->DATA.U16 = data_u16)
148 #define SI32_SPI_B_write_tx_fifo_u8(basePointer, data_u8) \ argument
149 (basePointer->DATA.U8 = data_u8)
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DSI32_SPI_A_Type.c39 SI32_SPI_A_Type * basePointer, in _SI32_SPI_A_initialize() argument
48 basePointer->CONTROL.U32 = control; in _SI32_SPI_A_initialize()
49 basePointer->CONFIG.U32 = config; in _SI32_SPI_A_initialize()
50 basePointer->CLKRATE.U32 = clkrate; in _SI32_SPI_A_initialize()
61 SI32_SPI_A_Type * basePointer, in _SI32_SPI_A_write_tx_fifo_u32() argument
66 basePointer->DATA.U32 = data_u32; in _SI32_SPI_A_write_tx_fifo_u32()
77 SI32_SPI_A_Type * basePointer, in _SI32_SPI_A_write_tx_fifo_u16() argument
82 basePointer->DATA.U16 = data_u16; in _SI32_SPI_A_write_tx_fifo_u16()
93 SI32_SPI_A_Type * basePointer, in _SI32_SPI_A_write_tx_fifo_u8() argument
98 basePointer->DATA.U8 = data_u8; in _SI32_SPI_A_write_tx_fifo_u8()
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DSI32_TIMER_A_Type.h80 #define SI32_TIMER_A_initialize(basePointer, config, clkdiv, count, capture) do{ \ argument
81 basePointer->CONFIG.U32 = config;\
82 basePointer->CLKDIV.U32 = clkdiv;\
83 basePointer->COUNT.U32 = count;\
84 basePointer->CAPTURE.U32 = capture;\
106 #define SI32_TIMER_A_write_config(basePointer, config) \ argument
107 (basePointer->CONFIG.U32 = config)
122 #define SI32_TIMER_A_read_config(basePointer) \ argument
123 (basePointer->CONFIG.U32)
135 #define SI32_TIMER_A_select_low_clock_source_apb_clock(basePointer) do{ \ argument
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