Searched refs:__IM (Results 1 – 25 of 787) sorted by relevance
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163 #ifndef __IM /*!< Fallback for older CMSIS versions */164 #define __IM __I macro245 __IM unsigned int RESERVED1 : 24; /*!< [31..8] reserved1 */316 __IM unsigned int HRESP_ERR6 : 1; /*!< [24..24] HRESP error bit */342 __IM unsigned int RESERVED1 : 24; /*!< [31..8] Reserved1 */353 __IM unsigned int RESERVED1 : 24; /*!< [31..8] Reserved1 */364 __IM unsigned int RESERVED1 : 24; /*!< [31..8] Reserved1 */445 __IM unsigned int RESERVED1 : 1; /*!< [31..31] Reserved1 */486 __IM unsigned int RESERVED1 : 20; /*!< [31..12] Reserved1 */498 __IM unsigned int RESERVED1 : 30; /*!< [31..2] Reserved1 */[all …]
48 __IM uint32_t CAL; /**< CRC of DI-page and calibration temperature */49 __IM uint32_t MODULEINFO; /**< Module trace information */50 __IM uint32_t MODXOCAL; /**< Module Crystal Oscillator Calibration */52 __IM uint32_t EXTINFO; /**< External Component description */54 __IM uint32_t EUI48L; /**< EUI48 OUI and Unique identifier */55 __IM uint32_t EUI48H; /**< OUI */56 __IM uint32_t CUSTOMINFO; /**< Custom information */57 __IM uint32_t MEMINFO; /**< Flash page size and misc. chip information */59 __IM uint32_t UNIQUEL; /**< Low 32 bits of device unique number */60 __IM uint32_t UNIQUEH; /**< High 32 bits of device unique number */[all …]
48 __IM uint32_t CAL; /**< CRC of DI-page and calibration temperature */50 __IM uint32_t EUI48L; /**< EUI48 OUI and Unique identifier */51 __IM uint32_t EUI48H; /**< OUI */52 __IM uint32_t CUSTOMINFO; /**< Custom information */53 __IM uint32_t MEMINFO; /**< Flash page size and misc. chip information */55 __IM uint32_t UNIQUEL; /**< Low 32 bits of device unique number */56 __IM uint32_t UNIQUEH; /**< High 32 bits of device unique number */57 __IM uint32_t MSIZE; /**< Flash and SRAM Memory size in kB */58 __IM uint32_t PART; /**< Part description */59 __IM uint32_t DEVINFOREV; /**< Device information page revision */[all …]
46 …__IM uint32_t IPVERSION; /**< IP version ID …49 …__IM uint32_t ECCERRADDR0; /**< ECC Error Address 0 …50 …__IM uint32_t ECCERRADDR1; /**< ECC Error Address 1 …51 …__IM uint32_t ECCERRADDR2; /**< ECC Error Address 2 …52 …__IM uint32_t ECCERRADDR3; /**< ECC Error Address 3 …53 …__IM uint32_t ECCMERRIND; /**< Multiple ECC error indication …59 …__IM uint32_t IPVERSION_SET; /**< IP version ID …62 …__IM uint32_t ECCERRADDR0_SET; /**< ECC Error Address 0 …63 …__IM uint32_t ECCERRADDR1_SET; /**< ECC Error Address 1 …64 …__IM uint32_t ECCERRADDR2_SET; /**< ECC Error Address 2 …[all …]
46 …__IM uint32_t IPVERSION; /**< IP Version …48 …__IM uint32_t PCHITS; /**< Performance Counter Hits …49 …__IM uint32_t PCMISSES; /**< Performance Counter Misses …50 …__IM uint32_t PCAHITS; /**< Performance Counter Advanced Hits …51 …__IM uint32_t STATUS; /**< Status Register …57 …__IM uint32_t IPVERSION_SET; /**< IP Version …59 …__IM uint32_t PCHITS_SET; /**< Performance Counter Hits …60 …__IM uint32_t PCMISSES_SET; /**< Performance Counter Misses …61 …__IM uint32_t PCAHITS_SET; /**< Performance Counter Advanced Hits …62 …__IM uint32_t STATUS_SET; /**< Status Register …[all …]
45 …__IM uint32_t HFRCODPLLCAL; /**< HFRCODPLL Calibration …50 …__IM uint32_t HFRCOEM23CAL; /**< HFRCOEM23 Calibration …60 …__IM uint32_t INFO; /**< DI Information …61 …__IM uint32_t PART; /**< Part Info …62 …__IM uint32_t MEMINFO; /**< Memory Info …63 …__IM uint32_t MSIZE; /**< Memory Size …64 …__IM uint32_t PKGINFO; /**< Misc Device Info …65 …__IM uint32_t CUSTOMINFO; /**< Custom Part Info …66 …__IM uint32_t SWFIX; /**< SW Fix Register …67 …__IM uint32_t SWCAPA0; /**< Software Restriction …[all …]
45 …__IM uint32_t HFRCODPLLCAL; /**< HFRCODPLL Calibration …60 …__IM uint32_t INFO; /**< DI Information …61 …__IM uint32_t PART; /**< Part Info …62 …__IM uint32_t MEMINFO; /**< Memory Info …63 …__IM uint32_t MSIZE; /**< Memory Size …64 …__IM uint32_t PKGINFO; /**< Misc Device Info …65 …__IM uint32_t CUSTOMINFO; /**< Custom Part Info …66 …__IM uint32_t SWFIX; /**< SW Fix Register …67 …__IM uint32_t SWCAPA0; /**< Software Restriction …68 …__IM uint32_t SWCAPA1; /**< Software Restriction …[all …]
46 __IM uint32_t CAL; /**< Calibration temperature and checksum */47 __IM uint32_t ADC0CAL0; /**< ADC0 Calibration register 0 */48 __IM uint32_t ADC0CAL1; /**< ADC0 Calibration register 1 */49 __IM uint32_t ADC0CAL2; /**< ADC0 Calibration register 2 */51 __IM uint32_t DAC0CAL0; /**< DAC calibrartion register 0 */52 __IM uint32_t DAC0CAL1; /**< DAC calibrartion register 1 */53 __IM uint32_t DAC0CAL2; /**< DAC calibrartion register 2 */54 __IM uint32_t AUXHFRCOCAL0; /**< AUXHFRCO calibration register 0 */55 __IM uint32_t AUXHFRCOCAL1; /**< AUXHFRCO calibration register 1 */56 __IM uint32_t HFRCOCAL0; /**< HFRCO calibration register 0 */[all …]
46 __IM uint32_t CAL; /**< Calibration temperature and checksum */47 __IM uint32_t ADC0CAL0; /**< ADC0 Calibration register 0 */48 __IM uint32_t ADC0CAL1; /**< ADC0 Calibration register 1 */49 __IM uint32_t ADC0CAL2; /**< ADC0 Calibration register 2 */51 __IM uint32_t IDAC0CAL0; /**< IDAC0 calibration register */52 __IM uint32_t USHFRCOCAL0; /**< USHFRCO calibration register */54 __IM uint32_t AUXHFRCOCAL0; /**< AUXHFRCO calibration register 0 */55 __IM uint32_t AUXHFRCOCAL1; /**< AUXHFRCO calibration register 1 */56 __IM uint32_t HFRCOCAL0; /**< HFRCO calibration register 0 */57 __IM uint32_t HFRCOCAL1; /**< HFRCO calibration register 1 */[all …]
