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Searched refs:_SMU_PPUFS_PERIPHID_RTCC (Results 1 – 25 of 69) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_smu.h335 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000021UL /**< Mode RTCC for … macro
372 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_smu.h335 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000021UL /**< Mode RTCC for … macro
372 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_smu.h351 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000022UL /**< Mode RTCC for … macro
391 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_smu.h351 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000022UL /**< Mode RTCC for … macro
391 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_smu.h351 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000022UL /**< Mode RTCC for … macro
391 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h451 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
508 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b390f1024gl112.h7886 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
7941 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b390f512gl112.h7886 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
7941 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b530f512il120.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b530f512im64.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b530f512iq100.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b530f512iq64.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b530f512gq100.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b530f512gq64.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b530f512il112.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b110f1024gm64.h8651 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8704 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b110f1024gq64.h8651 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8704 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b530f512gl112.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b530f512gl120.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b530f512gm64.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b510f1024gq100.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b510f1024gq64.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b510f1024gl112.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
Defm32gg12b510f1024gl120.h8688 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000027UL /**< Mode RTCC for … macro
8742 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h493 #define _SMU_PPUFS_PERIPHID_RTCC 0x00000026UL /**< Mode RTCC for … macro
558 #define SMU_PPUFS_PERIPHID_RTCC (_SMU_PPUFS_PERIPHID_RTCC << 0) /**< Shifted mode R…

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