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Searched refs:_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (Results 1 – 10 of 10) sorted by relevance

/hal_silabs-latest/gecko/emlib/src/
Dem_prs.c142 case _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1: in PRS_ConvertToSyncSource()
212 case _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1: in PRS_ConvertToSyncSignal()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_prs.c142 case _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1: in PRS_ConvertToSyncSource()
212 case _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1: in PRS_ConvertToSyncSignal()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_prs_signals.h146 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (0x00000024UL) macro
172 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 << 8)
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_prs_signals.h162 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (0x00000023UL) macro
189 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 << 8)
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_prs_signals.h165 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (0x00000023UL) macro
193 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_prs_signals.h186 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (0x00000022UL) macro
211 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 << …
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_prs_signals.h177 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (0x00000022UL) macro
204 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 << …
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_prs_signals.h165 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (0x00000023UL) macro
197 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_prs_signals.h165 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (0x00000023UL) macro
197 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_prs_signals.h177 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (0x00000022UL) macro
204 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER1 << …