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Searched refs:_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (Results 1 – 10 of 10) sorted by relevance

/hal_silabs-latest/gecko/emlib/src/
Dem_prs.c139 case _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0: in PRS_ConvertToSyncSource()
211 case _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0: in PRS_ConvertToSyncSignal()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_prs.c139 case _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0: in PRS_ConvertToSyncSource()
211 case _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0: in PRS_ConvertToSyncSignal()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_prs_signals.h145 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (0x00000023UL) macro
171 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 << 8)
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_prs_signals.h161 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (0x00000022UL) macro
188 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 << 8)
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_prs_signals.h164 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (0x00000022UL) macro
192 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_prs_signals.h185 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (0x00000021UL) macro
210 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 << …
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_prs_signals.h176 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (0x00000021UL) macro
203 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 << …
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_prs_signals.h164 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (0x00000022UL) macro
196 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_prs_signals.h164 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (0x00000022UL) macro
196 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_prs_signals.h176 #define _PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (0x00000021UL) macro
203 #define PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 (_PRS_ASYNC_CH_CTRL_SOURCESEL_TIMER0 << …