Home
last modified time | relevance | path

Searched refs:_MSC_READCTRL_MODE_WS2 (Results 1 – 25 of 76) sorted by relevance

1234

/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_msc.h99 #define _MSC_READCTRL_MODE_WS2 0x00000004UL /**< Mode… macro
106 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 0) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_msc.h192 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**< Mode… macro
197 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 20) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_msc.h191 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**< Mode W… macro
196 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 20) /**< Shifte…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_msc.h196 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**< Mode… macro
201 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 20) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_msc.h191 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**< Mode W… macro
196 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 20) /**< Shifte…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_msc.h187 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**< Mode W… macro
192 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 20) /**< Shifte…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_msc.h151 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**< Mo… macro
156 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**< Sh…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_msc.h151 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**< Mo… macro
156 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**< Sh…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_msc.h155 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
160 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_msc.h195 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**< Mode W… macro
200 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 20) /**< Shifte…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_msc.h195 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**< Mode W… macro
200 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 20) /**< Shifte…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_msc.h155 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
160 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_msc.h155 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
160 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_msc.h203 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**< Mode W… macro
208 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 20) /**< Shifte…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_msc.h187 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /*… macro
192 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /*…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_msc.h188 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /*… macro
193 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /*…
Defm32gg12b530f512il120.h2328 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
2333 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
Defm32gg12b530f512im64.h2328 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
2333 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
Defm32gg12b530f512iq100.h2328 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
2333 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
Defm32gg12b530f512iq64.h2328 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
2333 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
Defm32gg12b530f512gq100.h2328 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
2333 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
Defm32gg12b530f512gq64.h2328 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
2333 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
Defm32gg12b530f512il112.h2328 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
2333 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
Defm32gg12b110f1024gm64.h2320 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
2325 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…
Defm32gg12b110f1024gq64.h2320 #define _MSC_READCTRL_MODE_WS2 0x00000002UL /**… macro
2325 #define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) /**…

1234