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Searched refs:_MSC_RAMCTRL_RAM1CACHEEN_DEFAULT (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_msc.h656 #define _MSC_RAMCTRL_RAM1CACHEEN_DEFAULT 0x00000000UL /… macro
657 #define MSC_RAMCTRL_RAM1CACHEEN_DEFAULT (_MSC_RAMCTRL_RAM1CACHEEN_DEFAULT << 8) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_msc.h656 #define _MSC_RAMCTRL_RAM1CACHEEN_DEFAULT 0x00000000UL /… macro
657 #define MSC_RAMCTRL_RAM1CACHEEN_DEFAULT (_MSC_RAMCTRL_RAM1CACHEEN_DEFAULT << 8) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_msc.h656 #define _MSC_RAMCTRL_RAM1CACHEEN_DEFAULT 0x00000000UL /… macro
657 #define MSC_RAMCTRL_RAM1CACHEEN_DEFAULT (_MSC_RAMCTRL_RAM1CACHEEN_DEFAULT << 8) /…