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Searched refs:_MSC_CACHECMD_INVCACHE_DEFAULT (Results 1 – 25 of 69) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_msc.h421 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**< Mode DEF… macro
422 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_msc.h421 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**< Mode DEF… macro
422 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_msc.h483 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**< Mo… macro
484 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**< Sh…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_msc.h483 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**< Mo… macro
484 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**< Sh…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_msc.h502 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
503 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_msc.h502 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
503 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_msc.h502 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
503 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_msc.h614 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
615 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_msc.h655 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
656 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b530f512il120.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b530f512im64.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b530f512iq100.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b530f512iq64.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b530f512gq100.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b530f512gq64.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b530f512il112.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b110f1024gm64.h2787 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2788 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b110f1024gq64.h2787 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2788 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b530f512gl112.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b530f512gl120.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b530f512gm64.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b510f1024gq100.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b510f1024gq64.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b510f1024gl112.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…
Defm32gg12b510f1024gl120.h2795 #define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL /**… macro
2796 #define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) /**…

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