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Searched refs:_EMU_VMONAVDDCTRL_RISEWU_DEFAULT (Results 1 – 25 of 71) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_emu.h941 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
942 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_emu.h941 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
942 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h1034 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
1035 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h1017 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
1018 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h1034 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
1035 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h1017 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
1018 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h1034 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
1035 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h1145 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
1146 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b390f1024gl112.h3221 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
3222 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b390f512gl112.h3221 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
3222 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b530f512il120.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b530f512im64.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b530f512iq100.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b530f512iq64.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b530f512gq100.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b530f512gq64.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b530f512il112.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b110f1024gm64.h4052 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4053 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b110f1024gq64.h4052 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4053 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b530f512gl112.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b530f512gl120.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b530f512gm64.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b510f1024gq100.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
Defm32gg12b510f1024gq64.h4060 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
4061 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h1153 #define _EMU_VMONAVDDCTRL_RISEWU_DEFAULT 0x00000000UL … macro
1154 #define EMU_VMONAVDDCTRL_RISEWU_DEFAULT (_EMU_VMONAVDDCTRL_RISEWU_DEFAULT << 2…

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