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Searched refs:_EMU_PWRCTRL_REGPWRSEL_MASK (Results 1 – 25 of 73) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h795 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h778 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h795 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h778 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h795 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h906 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b390f1024gl112.h2982 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b390f512gl112.h2982 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b530f512il120.h3821 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b530f512im64.h3821 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b530f512iq100.h3821 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b530f512iq64.h3821 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b530f512gq100.h3821 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b530f512gq64.h3821 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b530f512il112.h3821 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b110f1024gm64.h3813 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b110f1024gq64.h3813 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b530f512gl112.h3821 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b530f512gl120.h3821 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
Defm32gg12b530f512gm64.h3821 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h914 #define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL … macro
/hal_silabs-latest/gecko/emlib/src/
Dem_emu.c2811 #if defined(_EMU_PWRCTRL_REGPWRSEL_MASK) in EMU_DCDCInit()
Dem_cmu.c11271 #if defined(_EMU_PWRCTRL_REGPWRSEL_MASK) in CMU_OscillatorEnable()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_emu.c2866 #if defined(_EMU_PWRCTRL_REGPWRSEL_MASK) in EMU_DCDCInit()
Dem_cmu.c11324 #if defined(_EMU_PWRCTRL_REGPWRSEL_MASK) in CMU_OscillatorEnable()

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