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Searched refs:_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK (Results 1 – 25 of 73) sorted by relevance

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/hal_silabs-latest/gecko/emlib/src/
Dem_emu.c2411 _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK in currentLimitersUpdate()
2417 EFM_ASSERT((lncLimSel & ~_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK) == 0x0U); in currentLimitersUpdate()
2420 EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~(_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK in currentLimitersUpdate()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_emu.c2466 _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK in currentLimitersUpdate()
2472 EFM_ASSERT((lncLimSel & ~_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK) == 0x0U); in currentLimitersUpdate()
2475 EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~(_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK in currentLimitersUpdate()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_emu.h764 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_emu.h764 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h882 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h865 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h882 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h865 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h882 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h993 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b390f1024gl112.h3069 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b390f512gl112.h3069 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b530f512il120.h3908 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b530f512im64.h3908 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b530f512iq100.h3908 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b530f512iq64.h3908 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b530f512gq100.h3908 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b530f512gq64.h3908 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b530f512il112.h3908 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b110f1024gm64.h3900 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b110f1024gq64.h3900 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b530f512gl112.h3908 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b530f512gl120.h3908 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
Defm32gg12b530f512gm64.h3908 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h1001 #define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL … macro

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