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Searched refs:_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK (Results 1 – 25 of 71) sorted by relevance

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/hal_silabs-latest/gecko/emlib/src/
Dem_emu.c2572 #if defined(_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) in lpCmpHystCalibrationLoad()
2576 if ((lpcmpHystSel & ~_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) != 0U) { in lpCmpHystCalibrationLoad()
2581 …EMU->DCDCLPEM01CFG = (EMU->DCDCLPEM01CFG & ~_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) | lpcmpHystSe… in lpCmpHystCalibrationLoad()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_emu.c2627 #if defined(_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) in lpCmpHystCalibrationLoad()
2631 if ((lpcmpHystSel & ~_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) != 0U) { in lpCmpHystCalibrationLoad()
2636 …EMU->DCDCLPEM01CFG = (EMU->DCDCLPEM01CFG & ~_EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK) | lpcmpHystSe… in lpCmpHystCalibrationLoad()
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_emu.h1186 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_emu.h1169 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_emu.h1186 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_emu.h1169 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_emu.h1186 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_emu.h1517 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b390f1024gl112.h3593 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b390f512gl112.h3593 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b530f512il120.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b530f512im64.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b530f512iq100.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b530f512iq64.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b530f512gq100.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b530f512gq64.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b530f512il112.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b110f1024gm64.h4424 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b110f1024gq64.h4424 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b530f512gl112.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b530f512gl120.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b530f512gm64.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b510f1024gq100.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
Defm32gg12b510f1024gq64.h4432 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_emu.h1533 #define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL … macro

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