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Searched refs:_DPLL_CFG1_M_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_dpll.h144 #define _DPLL_CFG1_M_MASK 0xFFFUL /**< Bit ma… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_dpll.h144 #define _DPLL_CFG1_M_MASK 0xFFFUL /**< Bit ma… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_dpll.h149 #define _DPLL_CFG1_M_MASK 0xFFFUL /**< Bit ma… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_dpll.h149 #define _DPLL_CFG1_M_MASK 0xFFFUL /**< Bit ma… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_dpll.h144 #define _DPLL_CFG1_M_MASK 0xFFFUL /**< Bit ma… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_dpll.h149 #define _DPLL_CFG1_M_MASK 0xFFFUL /**< Bit ma… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_dpll.h149 #define _DPLL_CFG1_M_MASK 0xFFFUL /**< Bit ma… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_dpll.h149 #define _DPLL_CFG1_M_MASK 0xFFFUL /**< Bit ma… macro
/hal_silabs-latest/simplicity_sdk/platform/service/power_manager/src/sleep_loop/
Dsl_power_manager_hal_s2.c253 …vert_delay_us_to_tick(DPLL_LOCKING_DELAY_US_FUNCTION((DPLL0->CFG1 & _DPLL_CFG1_M_MASK) >> _DPLL_CF… in sli_power_manager_init_hardware()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_cmu.c2691 EFM_ASSERT(init->m <= (_DPLL_CFG1_M_MASK >> _DPLL_CFG1_M_SHIFT)); in CMU_DPLLLock()
/hal_silabs-latest/gecko/emlib/src/
Dem_cmu.c2662 EFM_ASSERT(init->m <= (_DPLL_CFG1_M_MASK >> _DPLL_CFG1_M_SHIFT)); in CMU_DPLLLock()