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Searched refs:_DMA_STATUS_STATE_IDLE (Results 1 – 25 of 35) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_dma.h97 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
109 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32hg321f32.h457 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
469 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32hg321f64.h457 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
469 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32hg108f32.h503 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
515 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32hg108f64.h503 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
515 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32hg308f32.h515 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
527 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32hg308f64.h515 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
527 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dma.h105 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
117 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg360f128.h542 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
554 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg360f256.h542 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
554 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg360f64.h542 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
554 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg230f128.h617 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
629 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg230f256.h617 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
629 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg230f64.h617 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
629 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg232f128.h617 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
629 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg232f256.h617 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
629 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg232f64.h617 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
629 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg330f128.h630 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
642 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg330f256.h630 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
642 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg330f64.h630 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
642 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg332f128.h630 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
642 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg332f256.h630 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
642 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg332f64.h630 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
642 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg840f128.h622 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
634 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …
Defm32wg840f256.h622 #define _DMA_STATUS_STATE_IDLE 0x00000000UL /**< … macro
634 #define DMA_STATUS_STATE_IDLE (_DMA_STATUS_STATE_IDLE << 4) /**< …

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