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Searched refs:_DMA_CH_CTRL_SOURCESEL_I2C0 (Results 1 – 25 of 35) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_dma.h876 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
887 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32hg321f32.h1228 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
1238 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32hg321f64.h1228 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
1238 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32hg108f32.h1269 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
1278 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32hg108f64.h1269 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
1278 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32hg308f32.h1281 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
1290 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32hg308f64.h1281 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
1290 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_dma.h1601 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
1621 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg360f128.h2030 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2049 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg360f256.h2030 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2049 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg360f64.h2030 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2049 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg230f128.h2093 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2110 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg230f256.h2093 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2110 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg230f64.h2093 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2110 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg232f128.h2093 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2110 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg232f256.h2093 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2110 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg232f64.h2093 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2110 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg330f128.h2106 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2123 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg330f256.h2106 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2123 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg330f64.h2106 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2123 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg332f128.h2106 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2123 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg332f256.h2106 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2123 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg332f64.h2106 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2123 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg840f128.h2098 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2115 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …
Defm32wg840f256.h2098 #define _DMA_CH_CTRL_SOURCESEL_I2C0 0x00000014UL … macro
2115 #define DMA_CH_CTRL_SOURCESEL_I2C0 (_DMA_CH_CTRL_SOURCESEL_I2C0 << 16) …

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