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Searched refs:_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (Results 1 – 25 of 68) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_cmu.h254 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
257 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32hg210f32.h631 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
634 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32hg210f64.h631 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
634 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32hg222f32.h631 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
634 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32hg222f64.h631 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
634 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32hg110f32.h631 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
634 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32hg110f64.h631 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
634 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_cmu.h264 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
267 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg380f128.h665 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
668 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg380f256.h665 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
668 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg380f64.h665 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
668 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg390f128.h665 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
668 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg390f256.h665 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
668 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg390f64.h665 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
668 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg395f128.h665 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
668 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg395f256.h665 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
668 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg395f64.h665 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
668 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg280f128.h755 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
758 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg280f256.h755 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
758 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg280f64.h755 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
758 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg290f128.h755 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
758 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg290f256.h755 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
758 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg290f64.h755 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
758 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg295f128.h755 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
758 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …
Defm32wg295f256.h755 #define _CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 0x00000000UL … macro
758 #define CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 (_CMU_HFCORECLKDIV_HFCORECLKLEDIV_DIV2 << 8) …

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