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Searched refs:_CMU_CALCTRL_UPSEL_PRS (Results 1 – 25 of 89) sorted by relevance

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/hal_silabs-latest/simplicity_sdk/platform/peripheral/src/
Dsl_hal_dcdc_coulomb_counter.c277 case _CMU_CALCTRL_UPSEL_PRS: in sl_hal_dcdc_coulomb_counter_get_cal_reference_freq()
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_cmu.h328 #define _CMU_CALCTRL_UPSEL_PRS 0x00000001UL /**< Mode… macro
338 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 24) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_cmu.h348 #define _CMU_CALCTRL_UPSEL_PRS 0x00000001UL /**< Mode… macro
357 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 24) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_cmu.h352 #define _CMU_CALCTRL_UPSEL_PRS 0x00000001UL /**< Mode… macro
361 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 24) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_cmu.h352 #define _CMU_CALCTRL_UPSEL_PRS 0x00000001UL /**< Mo… macro
361 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 24) /**< Sh…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_cmu.h352 #define _CMU_CALCTRL_UPSEL_PRS 0x00000001UL /**< Mo… macro
361 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 24) /**< Sh…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_cmu.h384 #define _CMU_CALCTRL_UPSEL_PRS 0x00000001UL /**< Mode… macro
394 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 24) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_cmu.h376 #define _CMU_CALCTRL_UPSEL_PRS 0x00000001UL /**< Mode… macro
386 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 24) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_cmu.h384 #define _CMU_CALCTRL_UPSEL_PRS 0x00000001UL /**< Mode… macro
394 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 24) /**< Shif…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_cmu.h683 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
690 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_cmu.h683 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
690 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_cmu.h695 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
702 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_cmu.h695 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
702 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_cmu.h695 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
702 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_cmu.h702 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
709 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_cmu.h702 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
709 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
Defr32bg13p732f512gm32.h2697 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
2705 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
Defr32bg13p732f512gm48.h2697 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
2705 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
Defr32bg13p733f512gm48.h2697 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
2705 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
Defr32bg13p532f512gm48.h2697 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
2705 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
Defr32bg13p632f512gm32.h2697 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
2705 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
Defr32bg13p632f512gm48.h2697 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
2705 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
Defr32bg13p632f512im32.h2697 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
2705 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_cmu.h801 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
809 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_cmu.h801 #define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL /… macro
809 #define CMU_CALCTRL_UPSEL_PRS (_CMU_CALCTRL_UPSEL_PRS << 0) /…

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