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Searched refs:WDOG_IFS_WIN (Results 1 – 9 of 9) sorted by relevance

/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_wdog.h266 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interr… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_wdog.h266 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interr… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_wdog.h264 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interr… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_wdog.h266 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interr… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_wdog.h266 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interr… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_wdog.h266 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interr… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_wdog.h274 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interr… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_wdog.h264 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interr… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_wdog.h290 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interr… macro