Searched refs:USART1_SCLK_DIV_FAC (Results 1 – 3 of 3) sorted by relevance
2254 pCLK->CLK_CONFIG_REG2_b.USART1_SCLK_DIV_FAC = (unsigned int)(divFactor & 0x0F); in clk_usart_clk_div()3056 pCLK->CLK_CONFIG_REG2_b.USART1_SCLK_DIV_FAC = (unsigned int)(divFactor & 0x0F); in clk_usart_clk_config()3092 pCLK->CLK_CONFIG_REG2_b.USART1_SCLK_DIV_FAC = (unsigned int)(divFactor & 0x0F); in clk_usart_clk_config()3129 pCLK->CLK_CONFIG_REG2_b.USART1_SCLK_DIV_FAC = (unsigned int)(divFactor & 0x0F); in clk_usart_clk_config()3165 pCLK->CLK_CONFIG_REG2_b.USART1_SCLK_DIV_FAC = (unsigned int)(divFactor & 0x0F); in clk_usart_clk_config()3199 pCLK->CLK_CONFIG_REG2_b.USART1_SCLK_DIV_FAC = (unsigned int)(divFactor & 0x0F); in clk_usart_clk_config()
144 div_fac = M4CLK->CLK_CONFIG_REG2_b.USART1_SCLK_DIV_FAC; in RSI_CLK_GetBaseClock()
10507 __IOM unsigned int USART1_SCLK_DIV_FAC : 4; /*!< [6..3] Clock division factor for USART1 member
