Searched refs:ULP_UART_CLK_GEN_REG_b (Results 1 – 3 of 3) sorted by relevance
349 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_FRAC_CLK_SEL_b = (unsigned int)(bFrClkSel & 0x01); in ulpss_ulp_uar_clk_config()357 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLK_SEL = clkSource; in ulpss_ulp_uar_clk_config()364 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLK_SEL = clkSource; in ulpss_ulp_uar_clk_config()371 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLK_SEL = clkSource; in ulpss_ulp_uar_clk_config()377 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLK_SEL = clkSource; in ulpss_ulp_uar_clk_config()384 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLK_SEL = clkSource; in ulpss_ulp_uar_clk_config()391 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLK_SEL = clkSource; in ulpss_ulp_uar_clk_config()395 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLK_SEL = clkSource; in ulpss_ulp_uar_clk_config()401 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLK_SEL = clkSource; in ulpss_ulp_uar_clk_config()411 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLKDIV_FACTOR = (unsigned int)(divFactor & 0x07); in ulpss_ulp_uar_clk_config()
645 src_clk_mux = ULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLK_SEL; in RSI_CLK_GetBaseClock()674 div_fac = (ULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLKDIV_FACTOR); in RSI_CLK_GetBaseClock()
13805 } ULP_UART_CLK_GEN_REG_b; member