Home
last modified time | relevance | path

Searched refs:ULP_UART_CLKDIV_FACTOR (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/
Dclock_update.c674 div_fac = (ULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLKDIV_FACTOR); in RSI_CLK_GetBaseClock()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ulpss_clk.c411 pULPCLK->ULP_UART_CLK_GEN_REG_b.ULP_UART_CLKDIV_FACTOR = (unsigned int)(divFactor & 0x07); in ulpss_ulp_uar_clk_config()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/inc/
Dsi91x_device.h13802 __IOM unsigned int ULP_UART_CLKDIV_FACTOR : 3; /*!< [7..5] ulp uart clock member