Searched refs:ULP_MISC_SOFT_SET_REG_b (Results 1 – 3 of 3) sorted by relevance
820 pULPCLK->ULP_MISC_SOFT_SET_REG_b.PCLK_ENABLE_I2C_b = 1; in ulpss_peripheral_enable()823 pULPCLK->ULP_MISC_SOFT_SET_REG_b.EGPIO_CLK_EN_b = 1; in ulpss_peripheral_enable()824 pULPCLK->ULP_MISC_SOFT_SET_REG_b.EGPIO_PCLK_ENABLE_b = 1; in ulpss_peripheral_enable()840 pULPCLK->ULP_MISC_SOFT_SET_REG_b.FIM_PCLK_ENABLE_b = 1; in ulpss_peripheral_enable()842 pULPCLK->ULP_MISC_SOFT_SET_REG_b.FIM_CLK_EN_b = 1; in ulpss_peripheral_enable()844 pULPCLK->ULP_MISC_SOFT_SET_REG_b.FIM_CLK_EN_b = 0; in ulpss_peripheral_enable()849 pULPCLK->ULP_MISC_SOFT_SET_REG_b.VAD_CLK_EN_b = 1; in ulpss_peripheral_enable()852 pULPCLK->ULP_MISC_SOFT_SET_REG_b.VAD_PCLK_ENABLE_b = 1; in ulpss_peripheral_enable()855 pULPCLK->ULP_MISC_SOFT_SET_REG_b.CLK_ENABLE_TIMER_b = 1; in ulpss_peripheral_enable()857 pULPCLK->ULP_MISC_SOFT_SET_REG_b.TIMER_PCLK_EN_b = 1; in ulpss_peripheral_enable()[all …]
396 ULPCLK->ULP_MISC_SOFT_SET_REG_b.EGPIO_CLK_EN_b = SET; in sl_si91x_gpio_enable_clock()397 ULPCLK->ULP_MISC_SOFT_SET_REG_b.EGPIO_PCLK_ENABLE_b = SET; in sl_si91x_gpio_enable_clock()417 ULPCLK->ULP_MISC_SOFT_SET_REG_b.EGPIO_CLK_EN_b = CLR; in sl_si91x_gpio_disable_clock()418 ULPCLK->ULP_MISC_SOFT_SET_REG_b.EGPIO_PCLK_ENABLE_b = CLR; in sl_si91x_gpio_disable_clock()
13597 } ULP_MISC_SOFT_SET_REG_b; member
