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Searched refs:ULPCLKS_MRC_CLK_REG_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ipmu.c1499 reg_read = ULP_SPI_MEM_MAP(ULPCLKS_MRC_CLK_REG_OFFSET); in RSI_Clks_Trim32MHzRC()
1502 ULP_SPI_MEM_MAP(ULPCLKS_MRC_CLK_REG_OFFSET) = reg_read; in RSI_Clks_Trim32MHzRC()
1516 ULP_SPI_MEM_MAP(ULPCLKS_MRC_CLK_REG_OFFSET) &= ~BIT(i + 1); in RSI_Clks_Trim32MHzRC()
1517 ULP_SPI_MEM_MAP(ULPCLKS_MRC_CLK_REG_OFFSET) |= BIT(i); in RSI_Clks_Trim32MHzRC()
1521 ULP_SPI_MEM_MAP(ULPCLKS_MRC_CLK_REG_OFFSET) |= BIT(i); in RSI_Clks_Trim32MHzRC()
1526 trim_value = ULP_SPI_MEM_MAP(ULPCLKS_MRC_CLK_REG_OFFSET); in RSI_Clks_Trim32MHzRC()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/src/iPMU_prog/iPMU_dotc/
Dipmu_apis.c281 …update_ipmu_data(ULPCLKS_MRC_CLK_REG_OFFSET, ULP_SPI, (ipmu_calib_data->trim_sel << 14), MASK_BITS… in update_ipmu_calib_data()
505 PMU_DIRECT_ACCESS(ULPCLKS_MRC_CLK_REG_OFFSET) &= ~rc_mhz_en; in shut_down_non_wireless_mode_pds()
543 PMU_DIRECT_ACCESS(ULPCLKS_MRC_CLK_REG_OFFSET) &= ~rc_mhz_en; in shut_down_non_wireless_mode_pds()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_ipmu.h207 #define ULPCLKS_MRC_CLK_REG_OFFSET 0x104 macro
232 #define ULPCLKS_MRC_CLK_REG_OFFSET 0x104 macro