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Searched refs:ULPCLKS_HF_RO_CLK_REG_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/src/
Drsi_ipmu.c1561 ULP_SPI_MEM_MAP(ULPCLKS_HF_RO_CLK_REG_OFFSET) |= BIT(13); in RSI_IPMU_20M_ROClktrim()
1564 ULP_SPI_MEM_MAP(ULPCLKS_HF_RO_CLK_REG_OFFSET) &= ~BIT(13); in RSI_IPMU_20M_ROClktrim()
1567 ULP_SPI_MEM_MAP(ULPCLKS_HF_RO_CLK_REG_OFFSET) |= BIT(21) | BIT(12); in RSI_IPMU_20M_ROClktrim()
1582 ULP_SPI_MEM_MAP(ULPCLKS_HF_RO_CLK_REG_OFFSET) &= (uint32_t)~MASK_TRIM_VALUE_WRITE_BITS; in RSI_IPMU_20M_ROClktrim()
1584 ULP_SPI_MEM_MAP(ULPCLKS_HF_RO_CLK_REG_OFFSET) |= (ro50m_trim << 14); in RSI_IPMU_20M_ROClktrim()
1592 ULP_SPI_MEM_MAP(ULPCLKS_HF_RO_CLK_REG_OFFSET) &= ~BIT(21); in RSI_IPMU_20M_ROClktrim()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_ipmu.h208 #define ULPCLKS_HF_RO_CLK_REG_OFFSET 0x105 macro
233 #define ULPCLKS_HF_RO_CLK_REG_OFFSET 0x105 macro
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/src/iPMU_prog/iPMU_dotc/
Dipmu_apis.c312 …update_ipmu_data(ULPCLKS_HF_RO_CLK_REG_OFFSET, ULP_SPI, (ipmu_calib_data->trim_ring_osc << 14), MA… in update_ipmu_calib_data()
528 PMU_DIRECT_ACCESS(ULPCLKS_HF_RO_CLK_REG_OFFSET) &= ~ro_hf_en; in shut_down_non_wireless_mode_pds()