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Searched refs:ULPCLKS_32KXTAL_CLK_REG_OFFSET (Results 1 – 2 of 2) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/systemlevel/inc/
Drsi_ipmu.h214 #define ULPCLKS_32KXTAL_CLK_REG_OFFSET 0x10E macro
236 #define ULPCLKS_32KXTAL_CLK_REG_OFFSET 0x10E macro
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/core/chip/src/iPMU_prog/iPMU_dotc/
Dipmu_apis.c309 update_ipmu_data(ULPCLKS_32KXTAL_CLK_REG_OFFSET, ULP_SPI, data, MASK_BITS(4, 13)); in update_ipmu_calib_data()
533 PMU_DIRECT_ACCESS(ULPCLKS_32KXTAL_CLK_REG_OFFSET) &= ~xtal_32khz_en; in shut_down_non_wireless_mode_pds()